Abstract: Semiconductor devices, and more particularly arrangements of fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices are disclosed. Arrangements include conformal coatings or layers of fluorinated polymers that cover a semiconductor die on a package substrate of a semiconductor device. Such fluorinated polymer arrangements may also conformally coat various electrical connections for the semiconductor die, including wire bonds. Fluorinated polymers with low dielectric constants and low moisture permeability may thereby provide reduced moisture ingress in semiconductor devices while also reducing the impact of associated dielectric loss.

Abstract: A combiner/splitter is disclosed having a first trifilar transformer having a first outer transmission element electrically connected between a first port node and a first intermediate node. A second trifilar transformer has a second outer transmission element electrically connected between the first intermediate node and a second port node. A third trifilar transformer has a third outer transmission element electrically connected between the first port node and a second intermediate node. A fourth trifilar transformer has a fourth outer transmission element electrically connected between the second intermediate node and a third port node.

Abstract: A module package in which electronic components are packaged. The package module may comprise a base, at least one component, a housing, and a coaxial lead assembly. The component is over the base. The housing is over the base and encompasses the component. The coaxial lead assembly extends out of the housing and facilitates electrical connections with the component. The at least one coaxial lead assembly comprises a dielectric structure, a central conductor, and an outer conductor formed by a top wall extending between two side walls. The central conductor may be between the two side walls. The dielectric structure may reside between the central conductor and the outer conductor, such that the central conductor and outer conductor are isolated from one another.

Abstract: A radio frequency front-end is disclosed having a first power amplifier (PA) having a first PA input and a first PA output, a second PA having a second PA input and a second PA output, and a low-noise amplifier (LNA) having an LNA output connected to a receive output terminal and an LNA input. An input 90° hybrid coupler has a first port input connected to a transmit terminal, a second port input connected to a fixed voltage node through an isolation impedance, a third port output connected to the first amplifier input and a fourth port output connected to the second amplifier input. An output 90° hybrid coupler has a first port output connected to a common terminal, a second port output connected to the LNA input, a third port input connected to the second PA output, and a fourth port input connected to the first PA output.

Abstract: RF devices, and more particularly RF devices with photo-imageable polymers for high frequency enhancements and related methods are disclosed. High frequency enhancements are realized by providing air cavities registered with one or more operating portions of RF devices. The air cavities are formed by photo-imageable polymer structures that provide separation from high dielectric constant materials associated with sealing materials, such as overmold materials, that are typically used for environmental and/or mechanical protection in RF devices. Related methods are disclosed that include forming the photo-imageable polymer structures and corresponding air cavities through various lamination and patterning of photo-imageable polymer layers. Further radiation hardening steps are disclosed that may be applied to the photo-imageable polymer structures after air cavities are formed to promote improved structural integrity of the air cavities during subsequent fabrication steps and during operation of the RF devices.

Abstract: Radio frequency (RF) switch circuitry is disclosed having a field-effect transistor with a drain, a source, and a gate, wherein the gate is driven by switch driver circuitry having a control terminal for receiving switch-on and switch-off signals and a driver terminal for outputting on-state and off-state voltages. The switch driver circuitry is configured to respond to the switch-on signal by generating the on-state voltage that when applied to the gate allows an RF signal to pass between the drain and the source and respond to the switch-off signal by generating the off-state voltage that when applied to the gate blocks the RF signal from passing between the drain and the source. A low-pass filter has an inductor coupled between the gate and the driver terminal, wherein a direct current (DC) path between the gate and the driver terminal has a total DC resistance of no more than 100 ?.

Abstract: A radio frequency front-end is disclosed having a first power amplifier (PA) having a first PA input and a first PA output, a second PA having a second PA input and a second PA output, and a low-noise amplifier (LNA) having an LNA output connected to a receive output terminal and an LNA input. An input 90° hybrid coupler has a first port input connected to a transmit terminal, a second port input connected to a fixed voltage node through an isolation impedance, a third port output connected to the first amplifier input and a fourth port output connected to the second amplifier input. An output 90° hybrid coupler has a first port output connected to a common terminal, a second port output connected to the LNA input, a third port input connected to the second PA output, and a fourth port input connected to the first PA output.

Abstract: Semiconductor devices, and more particularly arrangements of fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices are disclosed. Arrangements include conformal coatings or layers of fluorinated polymers that cover a semiconductor die on a package substrate of a semiconductor device. Such fluorinated polymer arrangements may also conformally coat various electrical connections for the semiconductor die, including wire bonds. Fluorinated polymers with low dielectric constants and low moisture permeability may thereby provide reduced moisture ingress in semiconductor devices while also reducing the impact of associated dielectric loss.

Abstract: Radio frequency (RF) switch circuitry is disclosed having a field-effect transistor with a drain, a source, and a gate, wherein the gate is driven by switch driver circuitry having a control terminal for receiving switch-on and switch-off signals and a driver terminal for outputting on-state and off-state voltages. The switch driver circuitry is configured to respond to the switch-on signal by generating the on-state voltage that when applied to the gate allows an RF signal to pass between the drain and the source and respond to the switch-off signal by generating the off-state voltage that when applied to the gate blocks the RF signal from passing between the drain and the source. A low-pass filter has an inductor coupled between the gate and the driver terminal, wherein a direct current (DC) path between the gate and the driver terminal has a total DC resistance of no more than 100?.

Abstract: Enhanced air core transmission lines and transformers are disclosed. A transmission line or transformer is disposed on a dielectric substrate, with a first planar conductor on the dielectric substrate and a second planar conductor suspended above the first planar conductor. A set of support posts suspends the second planar conductor above the first planar conductor. Thermal performance of the transmission line or transformer is improved by having each of the set of support posts include a width which exceeds any gap between support posts. In some examples, openings are formed in the second planar conductor and may facilitate etching or other processes of forming the transmission line or transformer.

Abstract: Enhanced air core transmission lines and transformers are disclosed. A transmission line or transformer is disposed on a dielectric substrate, with a first planar conductor on the dielectric substrate and a second planar conductor suspended above the first planar conductor. A set of support posts suspends the second planar conductor above the first planar conductor. Thermal performance of the transmission line or transformer is improved by having each of the set of support posts include a width which exceeds any gap between support posts. In some examples, openings are formed in the second planar conductor and may facilitate etching or other processes of forming the transmission line or transformer.

Abstract: Transformers that provide impedance transformations within integrated circuits (ICs) are disclosed. Embodiments of the transformers may include a plurality of conductors connected in series within one another wherein the conductors are arranged to form transmission lines. A first port, a second port, and a third port are coupled to the conductors so that impedance transformations can be provided between the first port and the second port. Some embodiments of the transformers are arranged so that the third port can be used to apply a bias signal. The arrangement between the conductors and the ports allows the transformer to provide impedance transformations between the first port and the second port over a relatively wide passband at high frequency ranges and with relatively small insertion losses.

Abstract: The present disclosure relates to circuitry including an auto-bias circuit for a stacked FET power amplifier. The auto-bias circuit includes a dividing circuit and an averaging circuit. The dividing circuit is configured to receive a control signal with a control voltage and provide a first pre-gate signal having a first pre-gate voltage that corresponds to a fraction of the control voltage. The averaging circuit is configured to receive the control signal and a supply signal with a supply voltage and provide a second pre-gate signal having a second pre-gate voltage that corresponds to a fraction of a sum of the control voltage and the supply voltage. The stacked power amplifier includes a first FET in series with a second FET. The first FET receives a first gate signal derived from the first pre-gate signal. The second FET receives a second gate signal derived from the second pre-gate signal.

Abstract: A broadside-coupled transformer is disclosed. The broadside-coupled transformer has a dielectric substrate with a first planar conductor disposed on the dielectric substrate. The first planar conductor includes first and second ends. A second planar conductor is positioned over and spaced apart from the first planar conductor. The second planar conductor includes third and fourth ends. The fourth end is electrically coupled to the first end of the first planar conductor to realize a Ruthroff transformer configuration. Support posts for supporting the second planar conductor over the first planar conductor each have a bottom attached to the dielectric substrate without contacting the first planar conductor and a top attached to a surface of the second planar conductor.

Abstract: Monolithic attenuator, limiter, and linearizer circuitry to be integrated with other circuitry on a chip are provided. According to one aspect, a monolithic attenuator and limiter circuit comprises an input terminal, an output terminal, a first resistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal, and a second resistor having a first terminal coupled to the first or second terminal of the first resistor and a second terminal coupled to ground. At least the first resistor is a non-linear resistor whose resistance changes as a function of the voltage across the resistor. The monolithic attenuator and limiter circuit may be part of a “Pi” or “Tee” topology. According to another aspect, a non-linear shunt resistor coupled to the input of an amplifier circuit can operate to linearize the gain of the amplifier circuit over a range of input levels.

Abstract: A broadside-coupled transformer is disclosed. The broadside-coupled transformer has a dielectric substrate with a first planar conductor disposed on the dielectric substrate. The first planar conductor includes first and second ends. A second planar conductor is positioned over and spaced apart from the first planar conductor. The second planar conductor includes third and fourth ends. The fourth end is electrically coupled to the first end of the first planar conductor to realize a Ruthroff transformer configuration. Support posts for supporting the second planar conductor over the first planar conductor each have a bottom attached to the dielectric substrate without contacting the first planar conductor and a top attached to a surface of the second planar conductor.

Abstract: Monolithic attenuator, limiter, and linearizer circuitry to be integrated with other circuitry on a chip are provided. According to one aspect, a monolithic attenuator and limiter circuit comprises an input terminal, an output terminal, a first resistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal, and a second resistor having a first terminal coupled to the first or second terminal of the first resistor and a second terminal coupled to ground. At least the first resistor is a non-linear resistor whose resistance changes as a function of the voltage across the resistor. The monolithic attenuator and limiter circuit may be part of a “Pi” or “Tee” topology. According to another aspect, a non-linear shunt resistor coupled to the input of an amplifier circuit can operate to linearize the gain of the amplifier circuit over a range of input levels.

Abstract: The present disclosure relates to circuitry including an auto-bias circuit for a stacked FET power amplifier. The auto-bias circuit includes a dividing circuit and an averaging circuit. The dividing circuit is configured to receive a control signal with a control voltage and provide a first pre-gate signal having a first pre-gate voltage that corresponds to a fraction of the control voltage. The averaging circuit is configured to receive the control signal and a supply signal with a supply voltage and provide a second pre-gate signal having a second pre-gate voltage that corresponds to a fraction of a sum of the control voltage and the supply voltage. The stacked power amplifier includes a first FET in series with a second FET. The first FET receives a first gate signal derived from the first pre-gate signal. The second FET receives a second gate signal derived from the second pre-gate signal.

Abstract: Transformers that provide impedance transformations within integrated circuits (ICs) are disclosed. Embodiments of the transformers may include a plurality of conductors connected in series within one another wherein the conductors are arranged to form transmission lines. A first port, a second port, and a third port are coupled to the conductors so that impedance transformations can be provided between the first port and the second port. Some embodiments of the transformers are arranged so that the third port can be used to apply a bias signal. The arrangement between the conductors and the ports allows the transformer to provide impedance transformations between the first port and the second port over a relatively wide passband at high frequency ranges and with relatively small insertion losses.