Patents by Inventor Michael Roush

Michael Roush has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10685318
    Abstract: Computer program products, methods, systems, apparatus, and computing entities are provided for predicting and correcting addresses. In one embodiment, this includes applying exception rules to determine whether to generate an exception for an address. If an exception exists, there are various approaches for predicting or correcting the addresses.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: June 16, 2020
    Assignee: UNITED PARCEL SERVICE OF AMERICA, INC.
    Inventors: Milin Shah, Michael Roush
  • Publication number: 20160224938
    Abstract: Computer program products, methods, systems, apparatus, and computing entities are provided for predicting and correcting addresses. In one embodiment, this includes applying exception rules to determine whether to generate an exception for an address. If an exception exists, there are various approaches for predicting or correcting the addresses.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: MILIN SHAH, MICHAEL ROUSH
  • Publication number: 20160224931
    Abstract: Computer program products, methods, systems, apparatus, and computing entities are provided for predicting and correcting addresses. In one embodiment, this includes applying exception rules to determine whether to generate an exception for an address. If an exception exists, there are various approaches for predicting or correcting the addresses.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: MILIN SHAH, MICHAEL ROUSH
  • Publication number: 20160224936
    Abstract: Computer program products, methods, systems, apparatus, and computing entities are provided for predicting and correcting addresses. In one embodiment, this includes applying exception rules to determine whether to generate an exception for an address. If an exception exists, there are various approaches for predicting or correcting the addresses.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: MILIN SHAH, MICHAEL ROUSH
  • Publication number: 20160224937
    Abstract: Computer program products, methods, systems, apparatus, and computing entities are provided for predicting and correcting addresses. In one embodiment, this includes applying exception rules to determine whether to generate an exception for an address. If an exception exists, there are various approaches for predicting or correcting the addresses.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: MILIN SHAH, MICHAEL ROUSH
  • Patent number: 5893727
    Abstract: A method of fabricating an electrical interconnect are provided. A first transparent dielectric layer is disposed on top of a support structure. A conductive circuit layer is plated above the first dielectric layer. Separate conductive layers are plated on top of the conductive circuit layer to produce conductive vias. A second transparent dielectric layer is disposed around the conductive layers. Contact tips are electrically connected to the top surface of the separate conductive layers. The interconnect may be visually aligned so that the contact tips brought into contact with target connections. In addition, the support structure may be partially removed to allow a flexible interconnect.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: April 13, 1999
    Assignee: TRW Inc.
    Inventors: James Chung Kei Lau, Richard P. Malmgren, Michael Roush
  • Patent number: 5382759
    Abstract: An electrical interconnect and a method of fabricating an electrical interconnect are provided. A first transparent dielectric layer is disposed on top of a support structure. A conductive circuit layer is plated above the first dielectric layer. Separate conductive layers are plated on top of the conductive circuit layer to produce conductive vias. A second transparent dielectric layer is disposed around the conductive layers. Contact tips are electrically connected to the top surface of the separate conductive layers. The interconnect may be visually aligned so that the contact tips brought into contact with target connections. In addition, the support structure may be partially removed to allow a flexible interconnect.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: January 17, 1995
    Assignee: TRW Inc.
    Inventors: James C. Kei Lau, Richard P. Malmgren, Michael Roush