Patents by Inventor Michael S. Alfano

Michael S. Alfano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CREATING INTERCONNECTS BETWEEN DIES USING A CROSS-OVER DIE AND THROUGH-DIE VIAS
    Publication number: 20240071940
    Abstract: A semiconductor package includes a first die, a second die, and an interconnect die coupled to a first plurality of through-die vias in the first die and a second plurality of through-die vias in the second die. The interconnect die provides communications pathways the first die and the second die.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: RAHUL AGARWAL, RAJA SWAMINATHAN, MICHAEL S. ALFANO, GABRIEL H. LOH, ALAN D. SMITH, GABRIEL WONG, MICHAEL MANTOR
  • Creating interconnects between dies using a cross-over die and through-die vias
    Patent number: 11830817
    Abstract: A semiconductor package includes a first die, a second die, and an interconnect die coupled to a first plurality of through-die vias in the first die and a second plurality of through-die vias in the second die. The interconnect die provides communications pathways the first die and the second die.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: November 28, 2023
    Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC
    Inventors: Rahul Agarwal, Raja Swaminathan, Michael S. Alfano, Gabriel H. Loh, Alan D. Smith, Gabriel Wong, Michael Mantor
  • CREATING INTERCONNECTS BETWEEN DIES USING A CROSS-OVER DIE AND THROUGH-DIE VIAS
    Publication number: 20220051985
    Abstract: A semiconductor package includes a first die, a second die, and an interconnect die coupled to a first plurality of through-die vias in the first die and a second plurality of through-die vias in the second die. The interconnect die provides communications pathways the first die and the second die.
    Type: Application
    Filed: October 30, 2020
    Publication date: February 17, 2022
    Inventors: RAHUL AGARWAL, RAJA SWAMINATHAN, MICHAEL S. ALFANO, GABRIEL H. LOH, ALAN D. SMITH, GABRIEL WONG, MICHAEL MANTOR
  • Interposer with beyond reticle field conductor pads
    Patent number: 9806014
    Abstract: Various interposers and methods of manufacturing related thereto are disclosed. In one aspect, an apparatus is provided that includes an interposer that has a first side and a second side opposite the first side. The first side has a first reticle field and a second reticle field larger than the first reticle field. Plural conductor pads are positioned on the first side in the first reticle field. Plural dummy conductor pads are positioned on the first side in the second reticle field and outside the first reticle field.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: October 31, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael S. Alfano, Bryan Black, Michael Z. Su, Joseph R. Siegel, Julius E. Din, Anwar Kashem
  • Semiconductor workpiece with selective backside metallization
    Patent number: 9793239
    Abstract: Various semiconductor workpieces with selective backside metallizations and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor workpiece that has multiple dies. A backside metallization is fabricated on a first die of the dies but not on a second die of the dies.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: October 17, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael Z. Su, Michael S. Alfano, Bryan Black
  • INTERPOSER WITH BEYOND RETICLE FIELD CONDUCTOR PADS
    Publication number: 20170213787
    Abstract: Various interposers and methods of manufacturing related thereto are disclosed. In one aspect, an apparatus is provided that includes an interposer that has a first side and a second side opposite the first side. The first side has a first reticle field and a second reticle field larger than the first reticle field. Plural conductor pads are positioned on the first side in the first reticle field. Plural dummy conductor pads are positioned on the first side in the second reticle field and outside the first reticle field.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 27, 2017
    Inventors: Michael S. Alfano, Bryan Black, Michael Z. Su, Joseph R. Siegel, Julius E. Din, Anwar Kashem
  • SEMICONDUCTOR WORKPIECE WITH SELECTIVE BACKSIDE METALLIZATION
    Publication number: 20170092616
    Abstract: Various semiconductor workpieces with selective backside metallizations and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor workpiece that has multiple dies. A backside metallization is fabricated on a first die of the dies but not on a second die of the dies.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Michael Z. Su, Michael S. Alfano, Bryan Black
  • SEMICONDUCTOR CHIP WITH OFFLOADED LOGIC
    Publication number: 20160329312
    Abstract: Various semiconductor chip and interposer devices are disclosed. In one aspect, an apparatus is provided that includes an interposer, a first semiconductor chip mounted on the interposer and a second semiconductor chip mounted on and electrically connected to the first semiconductor chip by the interposer. The second semiconductor chip includes offloaded logic of the first semiconductor chip.
    Type: Application
    Filed: May 5, 2015
    Publication date: November 10, 2016
    Inventors: Sean M. O'Mullan, Michael S. Alfano, Bryan Black