Patents by Inventor Michael S. Cohen
Michael S. Cohen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240041310Abstract: Systems and methods are provided for diagnosing otitis media. The method includes receiving an image captured from an image sensor and determining an instruction for a user to adjust a position of the image sensor to bring the image sensor into alignment with a tympanic membrane of a subject. The determined instruction is to the user via an output device. A clinical parameter representing otitis media is determined from an image of the tympanic membrane of the subject at a predictive model. The clinical parameter is provided to the user via the output device.Type: ApplicationFiled: December 22, 2021Publication date: February 8, 2024Inventors: Christopher J. Hartnick, Michael S. Cohen, Matthew G. Crowson, Fouzi Benboujja
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Patent number: 9505766Abstract: Methods of inhibiting kinases using kinase inhibitors having olefin moieties are disclosed.Type: GrantFiled: August 18, 2014Date of Patent: November 29, 2016Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: John William Taunton, Jr., Rebecca Maglathlin, Iana Serafimova, Michael S. Cohen, Rand Miller, Ville Paavilainen, Jesse McFarland, Shyam Krishnan
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Publication number: 20150045343Abstract: Methods of inhibiting kinases using kinase inhibitors having olefin moieties are disclosed.Type: ApplicationFiled: August 18, 2014Publication date: February 12, 2015Inventors: John William Taunton, Jr., Rebecca Maglathlin, Iana Serafimova, Michael S. Cohen, Rand Miller, Ville Paavilainen, Jesse McFarland, Shyam Krishnan
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Publication number: 20130035325Abstract: Methods of inhibiting kinases using kinase inhibitors having olefin moieties are disclosed.Type: ApplicationFiled: November 16, 2010Publication date: February 7, 2013Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: John William Taunton, JR., Rebecca Maglathlin, Iana Serafimova, Michael S. Cohen, Rand Miller, Ville Paavilainen, Jesse McFarland, Shyam Krishnan
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Patent number: 7283743Abstract: Systems and methods for actively monitoring and managing the integrity of an optical fiber communications link. The optical fiber link integrity is monitored to guard against intrusions and other security breaches. In one embodiment, a local and a remote active monitoring system are coupled by four fiber paths that provide primary and back-up transmit and receive paths between communication equipment. In one embodiment, a security light signal is transmitted using a secondary wavelength that differs from the wavelength used to transmit a user data light signal and travels in an opposite direction relative to the user data light signal. An active monitoring system monitors both administrative information contained within the security light signal and the intensity of the security light signal to manage the integrity of the fiber optic link. Methods are provided to characterize events impacting the fiber optic link integrity.Type: GrantFiled: January 24, 2003Date of Patent: October 16, 2007Assignee: NeSTRONIX, Inc.Inventors: Bret Allen Matz, Michael S. Cohen, Richard Charles Downs
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Publication number: 20040126110Abstract: Systems and methods for actively monitoring and managing the integrity of an optical fiber communications link. The optical fiber link integrity is monitored to guard against intrusions and other security breaches. In one embodiment, a local and a remote active monitoring system are coupled by four fiber paths that provide primary and back-up transmit and receive paths between communication equipment. In one embodiment, a security light signal is transmitted using a secondary wavelength that differs from the wavelength used to transmit a user data light signal and travels in an opposite direction relative to the user data light signal. An active monitoring system monitors both administrative information contained within the security light signal and the intensity of the security light signal to manage the integrity of the fiber optic link. Methods are provided to characterize events impacting the fiber optic link integrity.Type: ApplicationFiled: January 24, 2003Publication date: July 1, 2004Inventors: Bret Allen Matz, Michael S. Cohen, Richard Charles Downs
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Publication number: 20040037556Abstract: Systems and methods for actively monitoring and managing the integrity of an optical fiber communications link. The optical fiber link integrity is monitored to guard against intrusions and other security breaches. In one embodiment, a local and a remote active monitoring system are coupled by four fiber paths that provide primary and back-up transmit and receive paths between communication equipment. In one embodiment, a security light signal is transmitted using a secondary wavelength that differs from the wavelength used to transmit a user data light signal and travels in an opposite direction relative to the user data light signal. An active monitoring system monitors both administrative information contained within the security light signal and the intensity of the security light signal to manage the integrity of the fiber optic link. Methods are provided to characterize events impacting the fiber optic link integrity.Type: ApplicationFiled: February 25, 2003Publication date: February 26, 2004Inventors: Bret Allen Matz, Michael S. Cohen, Richard Charles Downs
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Publication number: 20030023732Abstract: A method and associated apparatus to secure access to peripheral devices and maintain accounting of usage and billing to users of peripheral devices and documents that are processed by the documents by way of a centralized device. The central device and peripheral devices are connected by a network such as the Internet. The central device performs pattern recognition of documents and maintains user account information, denying or allowing access of users to peripheral devices depending on the user status. Peripheral devices are updated by the central device according to recent account updates and changes.Type: ApplicationFiled: March 13, 2001Publication date: January 30, 2003Inventor: Michael S. Cohen
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Patent number: 6477595Abstract: A digital subscriber line (DSL) multiplexer is used in conjunction with a DSL modem to provide a reliable high speed connection for an end-user. The scaleable DSL multiplexer supports multiple DSL modems to a number of subscriber desiring increased bandwidth. The connection is reliably maintained by the multiplexer which utilizes a proprietary protocol to exchange management information to monitor the connection.Type: GrantFiled: April 11, 2000Date of Patent: November 5, 2002Assignee: E-Cell TechnologiesInventors: Michael S. Cohen, K. C. Babu, R. Balasubramanyam, Murali Ramanathan, P. K. Nanda Kumar
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Patent number: 6404861Abstract: A modem using digital subscriber line (DSL) provides high speed access over a copper plant. The DSL modem exchanges management information to a terminating multiplexer using a proprietary protocol, thus enabling reliable, fast access to networking resources.Type: GrantFiled: April 11, 2000Date of Patent: June 11, 2002Assignee: e-Cell TechnologiesInventors: Michael S. Cohen, K. C. Babu, R. Balasubramanyam, Murali Ramanathan, P.K. Nanda Kumar
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Patent number: 6131255Abstract: An apparatus for integrating wafer scale semiconductor integrated circuits and interfacing them with other systems. A wafer, partial wafer, die or plurality of same are mated to a printed circuit board (PCB) which electrically contacts the pads on each die using small conductive pillars. The PCB in turn is connected easily to other electronic systems. The entire apparatus is incorporated into other systems which utilize the dice in the apparatus. The apparatus may be fitted with heating elements and cooling channels to generate the necessary die temperatures for burn-in, testing, and operation. The apparatus is easily adaptable to include more dice in a stacked configuration.Type: GrantFiled: August 25, 1998Date of Patent: October 17, 2000Assignee: Micron Technology, Inc.Inventors: Glen G. Atkins, Michael S. Cohen, Karl H. Mauritz, James M. Shaffer
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Patent number: 6049977Abstract: A method of forming electrically conductive pillars on a printed circuit board by providing a printed circuit board having a plurality of electrical traces and forming a plurality of elongate, electrically conductive pillars of superimposed layers of solder and conductive polymer on the printed circuit board. The elongate, electrically conductive pillars are connected by a first end to the electrical traces of the printed circuit board and extend substantially perpendicularly from the printed circuit board such that a second end of each of the plurality of elongate, electrically conductive pillars lies in substantially a common plane which is substantially perpendicular to and above said printed circuit board.Type: GrantFiled: May 15, 1997Date of Patent: April 18, 2000Assignee: Micron Technology, Inc.Inventors: Glen G. Atkins, Michael S. Cohen, Karl H. Mauritz, James M. Shaffer
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Patent number: 5831445Abstract: An apparatus for wafer scale burn-in and testing of semiconductor integrated circuits and a method for its utilization is disclosed. A wafer is mated to a printed circuit board which electrically contacts the pads on each die using small conductive pillars. Single precise alignment of entire wafer within apparatus allows for testing all the dice on the wafer in parallel, eliminating need to probe each die individually. The apparatus is fitted with heating elements and cooling channels to generate the necessary wafer temperatures for burn-in and testing. The method of utilization eliminates processing of defective dice beyond burn-in and test, thereby increasing throughput.Type: GrantFiled: June 7, 1996Date of Patent: November 3, 1998Assignee: Micron Technology, Inc.Inventors: Glen G. Atkins, Michael S. Cohen, Karl H. Mauritz, James M. Shaffer
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Patent number: 5798565Abstract: An apparatus for integrating wafer scale semiconductor integrated circuits and interfacing them with other systems. A wafer, partial wafer, die or plurality of same are mated to a printed circuit board (PCB) which electrically contacts the pads on each die using small conductive pillars. The PCB in turn is connected easily to other electronic systems. The entire apparatus is incorporated into other systems which utilize the dice in the apparatus. The apparatus may be fitted with heating elements and cooling channels to generate the necessary dice temperatures for burn-in, testing, and operation. The apparatus is easily adaptable to include more dice in a stacked configuration.Type: GrantFiled: January 23, 1995Date of Patent: August 25, 1998Assignee: Micron Technology, Inc.Inventors: Glen G. Atkins, Michael S. Cohen, Karl H. Mauritz, James M. Shaffer
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Patent number: 5682064Abstract: An apparatus for integrating wafer scale semiconductor integrated circuits and interfacing them with other systems. A wafer, partial wafer, die or plurality of same are mated to a printed circuit board (PCB) which electrically contacts the pads on each die using small conductive pillars. The PCB in turn is connected easily to other electronic systems. The entire apparatus is incorporated into other systems which utilize the dice in the apparatus. The apparatus may be fitted with heating elements and cooling channels to generate the necessary dice temperatures for burn-in, testing, and operation. The apparatus is easily adaptable to include more dice in a stacked configuration.Type: GrantFiled: January 23, 1995Date of Patent: October 28, 1997Assignee: Micron Technology, Inc.Inventors: Glen G. Atkins, Michael S. Cohen, Karl H. Mauritz, James M. Shaffer
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Patent number: 5570032Abstract: An apparatus for wafer scale burn-in and testing of semiconductor integrated circuits and a method for its utilization. A wafer is mated to a printed circuit board which electrically contacts the pads on each die using small conductive pillars. Single precise alignment of entire wafer within apparatus allows for testing all the dice on the wafer in parallel, eliminating need to probe each die individually. The apparatus is fitted with heating elements and cooling channels to generate the necessary wafer temperatures for burn-in and testing. The method of utilization eliminates processing of defective dice beyond burn-in and test, thereby increasing throughput.Type: GrantFiled: August 17, 1993Date of Patent: October 29, 1996Assignee: Micron Technology, Inc.Inventors: Glen G. Atkins, Michael S. Cohen, Karl H. Mauritz, James M. Shaffer
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Patent number: 5282237Abstract: A ring communications network having a plurality of line concentrators (10) each including a ring-in port (16), a ring-out port (18), and a plurality of station ports (20), includes the feature of being able to detect a fault in the trunk cable between concentrators and reconfiguring the ring to bypass that fault. Fault detection is accomplished by injecting a phantom DC voltage at the ring-out port and sensing whether current due to that voltage is present at both the ring-out port and the ring-in port of the next adjacent concentrator in the ring.Type: GrantFiled: September 3, 1991Date of Patent: January 25, 1994Assignee: The Whitaker CorporationInventors: K. C. Babu, Michael S. Cohen, Thomas A. Donnelly, Kumar K. R. Hemant, Bret A. Matz
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Patent number: 5278796Abstract: A temperature sensing circuit allows a DRAM array to use less power than would normally be possible due to the reduced refresh rate based on the temperature of the DRAM array. The temperature circuit removes the refresh guardbanding on the DRAMS. Instead of refreshing a 1 megabyte DRAM every 8 ms, refreshing the DRAMs every 128 ms is possible, depending on the temperature of the DRAM array.Type: GrantFiled: April 12, 1991Date of Patent: January 11, 1994Assignee: Micron Technology, Inc.Inventors: Charles W. Tillinghast, Michael S. Cohen, Thomas W. Voshell
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Patent number: 5276843Abstract: A dynamic random access memory (DRAM) array is configured to appear to a host computer as a static random access memory (SRAM) array. This allows the use of a component which is functionally equivalent to an SRAM array, but which is less costly and which provides more memory in the same unit area. A temperature sensing circuit allows the DRAM array to use less power than would normally be possible by using a reduced refresh rate based on the temperature of the DRAM array. For example, instead of refreshing a 1 megabyte DRAM every 8 ms, refreshing the DRAM every 128 ms is possible, depending on the temperature of the DRAM array.Type: GrantFiled: April 12, 1991Date of Patent: January 4, 1994Assignee: Micron Technology, Inc.Inventors: Charles W. Tillinghast, Michael S. Cohen, Thomas W. Voshell