Patents by Inventor Michael S. Hockema

Michael S. Hockema has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10784859
    Abstract: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: September 22, 2020
    Assignee: Raytheon Company
    Inventors: Sriram Chandrasekaran, Michael S. Hockema
  • Patent number: 10778218
    Abstract: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: September 15, 2020
    Assignee: Raytheon Company
    Inventors: Sriram Chandrasekaran, Michael S. Hockema
  • Publication number: 20200106436
    Abstract: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.
    Type: Application
    Filed: July 23, 2019
    Publication date: April 2, 2020
    Inventors: Sriram Chandrasekaran, Michael S. Hockema
  • Publication number: 20200106435
    Abstract: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.
    Type: Application
    Filed: July 23, 2019
    Publication date: April 2, 2020
    Inventors: Sriram Chandrasekaran, Michael S. Hockema
  • Patent number: 10361698
    Abstract: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: July 23, 2019
    Assignee: Raytheon Company
    Inventors: Sriram Chandrasekaran, Michael S. Hockema
  • Publication number: 20180241391
    Abstract: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.
    Type: Application
    Filed: January 23, 2017
    Publication date: August 23, 2018
    Inventors: Sriram Chandrasekaran, Michael S. Hockema