Patents by Inventor Michael S. Paterson

Michael S. Paterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6185220
    Abstract: A systematic method for creating layouts for various sorting and switching networks on VLSI chips is proposed. These sorting and switching networks include butterfly switching networks, benes networks, odd-even sorting networks, and bitonic sorting networks. The present invention utilizes the existing VLSI grid-model to create various layouts. A rectangular layout is proposed which introduces the use of an additional row to create an area-efficient layout for various switching networks. A diamond layout is proposed which further improves rectangular layout by reducing the number of columns required. A suitable combination of diamond and rectangular layouts is also proposed.
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: February 6, 2001
    Assignee: Lucent Technologies, Inc.
    Inventors: Shanmugavelayut Muthukrishnan, Suleyman Cenk Sahinalp, Michael S. Paterson