Abstract: An improved light emitting heterostructure. In particular, a nitride-based light emitting heterostructure is provided that includes a light generating structure and a distributed semiconductor heterostructure Bragg reflector structure formed above the light generating structure. In operation, the light generating structure generates light, a portion of which is reflected by the distributed semiconductor heterostructure Bragg reflector structure, thereby increasing the total amount of light that can be emitted from the heterostructure.

Abstract: An improved light emitting heterostructure. In particular, a nitride-based light emitting heterostructure is provided that includes a light generating structure and a distributed semiconductor heterostructure Bragg reflector structure formed above the light generating structure. In operation, the light generating structure generates light, a portion of which is reflected by the distributed semiconductor heterostructure Bragg reflector structure, thereby increasing the total amount of light that can be emitted from the heterostructure.

Abstract: A complementary (Al,Ga)As/GaAs heterostructure insulated gate field-effect transistor (HIGFET) approach is described in which both the n-channel and p-channel transistors utilize a two-dimensional electron (hole) gas in undoped high mobility channels to form planar, complementary GaAs-based integrated circuits.

Abstract: The gated Transmission Line Model (GTLM) structure is a novel characterization device and measurement tool for integrated circuit process monitoring. This test structure has Schottky gates between the ohmic contacts of a TLM pattern. The gate lengths are varied and the gate-to- ohmic separations are kept constant to provide an accurate determination of several important FET channel parameters. It offers a precise method for measuring the FET source resistance which requires no parameter fitting and which works equally well on planar, self-aligned gate, and recessed gate FET's. In addition, the GTLM structure offers the only available means to measure sheet resistance of enhancement-mode FET channels. The gated-TLM structure can also be used to find the effective free surface potential. The structure may be combined with capacitance-voltage analysis or geometric magnetoresistance analysis to create mobility and doping profile of actual FET channels.