Abstract: A protective disk for protecting a semiconductor wafer during processing includes an adhesive layer configured to adhere to the semiconductor wafer and a support layer coupled to the adhesive layer configured to provide strength and stiffness to the semiconductor wafer during processing. In one aspect of the invention, the protective disk is soluble in a mildly alkaline or mildly acidic solution. In another aspect, the adhesive layer comprises a high molecular weight polymer. In another aspect, the support layer comprises a polymer and a filler. The present invention may enable a robust, cost-effective, high-volume, automated process for thinning semiconductor wafers below 150 ?m, and for subsequent process steps of stress relief and transfer to a dicing frame for die singulation. Additionally, the invention enables use of existing toolsets and processes to produce thinner substrates than conventionally achievable.

Abstract: Exemplary methods, systems and apparatus are provided for accomplishing mixing of chemistries, such as those used in polishing materials used in semiconductor manufacturing. A manifold is provided that combines chemistries with a mixing element, for example, so that the stability of the chemical solution can be maintained so as to facilitate polishing. The mixing element can be oriented in a stationary position, or alternatively, it can be agitated.

Abstract: Exemplary methods, systems and apparatus are provided for accomplishing mixing of chemistries, such as those used in polishing materials used in semiconductor manufacturing. A manifold is provided that combines chemistries with a mixing element, for example, so that the stability of the chemical solution can be maintained so as to facilitate polishing. The mixing element can be oriented in a stationary position, or alternatively, it can be agitated.

Abstract: Apparatus for determining the flatness of a generally circular polishing pad through direct measurement of the pad for use in maintaining the flatness of the pad and the flatness of surfaces of articles polished on the polishing pad of a polisher. The apparatus includes a measuring device, a frame mounting the measuring device being capable of measuring a distance between an upper surface of the polishing pad and a reference plane at plural locations along the polishing pad. The apparatus further includes a controller for controlling the measuring device. The controller is configured to indicate whether the flatness of the pad falls outside a predetermined specification.

Abstract: A method of rough polishing a semiconductor wafer to reduce roughness on a surface of the wafer prior to finish polishing the wafer by applying a polishing solution to a polishing material, contacting the polishing material and the polishing solution with the surface of the wafer as the wafer moves relative to the polishing material to reduce low frequency surface roughness of the wafer, applying a second polishing solution to the polishing material, and contacting the polishing material and the second polishing solution with the surface of the wafer as the wafer moves relative to the polishing material to further reduce the low frequency surface roughness, wherein the wafer has an average surface roughness not greater than 1.0 nm Ra, as measured on a 1 mm.times.1 mm scan with an optical interferometer, after being rough polished.

Abstract: A semiconductor wafer polisher of the present invention for polishing at least one semiconductor wafer to flatten a first face of the wafer and reduce the thickness of the wafer from an initial thickness t.sub.1 to a predetermined final thickness t.sub.2. The polisher comprises a first surface including a polishing surface portion, a second surface including a second surface portion, and a wafer carrier for holding the semiconductor wafer between the polishing surface portion and the second surface portion. At least one polishing limiter is between the first and second surfaces for limiting the reduction in thickness of the wafer. The wafer carrier and polishing limiter are integrally formed such that the polishing limiter and wafer carrier constitute a single unitary piece.