Patents by Inventor Michael Scarpulla

Michael Scarpulla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11563078
    Abstract: Ultra-compact inductor devices for use in integrated circuits (e.g., RF ICs) that use 3-dimensional Dirac materials for providing the inductor. Whereas inductors currently require significant real estate on an integrated circuit, because they require use of an electrically conductive winding around an insulative core, or such metal deposited in a spiral geometry, the present devices can be far more compact, occupying significantly less space on an integrated circuit. For example, an ultra-compact inductor that could be included in an integrated circuit may include a 3-dimensional Dirac material formed into a geometric shape capable of inductance (e.g., as simple as a stripe or series of stripes of such material), deposited on a substantially non-conductive (i.e., insulative) substrate, on which the Dirac material in the selected geometric shape is positioned. Low temperature manufacturing methods compatible with CMOS manufacturing are also provided.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: January 24, 2023
    Assignee: THE UNIVERSITY OF UTAH RESEARCH FOUNDATION
    Inventors: Berardi Sensale Rodriguez, Ashish Chanana, Steven M Blair, Vikram Deshpande, Michael A Scarpulla, Hugo Orlando Condori, Jeffrey Walling
  • Publication number: 20210288136
    Abstract: Ultra-compact inductor devices for use in integrated circuits (e.g., RF ICs) that use 3-dimensional Dirac materials for providing the inductor. Whereas inductors currently require significant real estate on an integrated circuit, because they require use of an electrically conductive winding around an insulative core, or such metal deposited in a spiral geometry, the present devices can be far more compact, occupying significantly less space on an integrated circuit. For example, an ultra-compact inductor that could be included in an integrated circuit may include a 3-dimensional Dirac material formed into a geometric shape capable of inductance (e.g., as simple as a stripe or series of stripes of such material), deposited on a substantially non-conductive (i.e., insulative) substrate, on which the Dirac material in the selected geometric shape is positioned. Low temperature manufacturing methods compatible with CMOS manufacturing are also provided.
    Type: Application
    Filed: March 12, 2020
    Publication date: September 16, 2021
    Inventors: Berardi Sensale-Rodriguez, Ashish Chanana, Steven M. Blair, Vikram Deshpande, Michael A. Scarpulla, Hugo Orlando Condori, Jeffrey Walling
  • Patent number: 10453988
    Abstract: A method of creating cadmium telluride films is presented. The method demonstrates heterogeneous nucleation of CdTe directly on a substrate through sequential deposition of aqueous precursor solutions containing cadmium and telluride ions, respectively. The method can include (i) applying a cadmium precursor solution to the substrate to form a cadmium precursor film on the substrate, (ii) applying a telluride precursor solution to the cadmium precursor film. The telluride precursor solution includes Te2? in solution such that a CdTe film is adherently formed directly on the substrate.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: October 22, 2019
    Assignee: University of Utah Research Foundation
    Inventors: Carina Hahn, Dennis Pruzan, Michael Scarpulla
  • Publication number: 20170352775
    Abstract: A method of creating cadmium telluride films is presented. The method demonstrates heterogeneous nucleation of CdTe directly on a substrate through sequential deposition of aqueous precursor solutions containing cadmium and telluride ions, respectively. The method can include (i) applying a cadmium precursor solution to the substrate to form a cadmium precursor film on the substrate, (ii) applying a telluride precursor solution to the cadmium precursor film. The telluride precursor solution includes Te2? in solution such that a CdTe film is adherently formed directly on the substrate.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 7, 2017
    Inventors: Carina Hahn, Dennis Pruzan, Michael Scarpulla