Patents by Inventor Michael Scheel
Michael Scheel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11809249Abstract: A port controller circuit is configured to control power transfer on a power path between a first terminal and a second terminal. The controller circuit includes first and second transistors connected in series between the first terminal and the second terminal, a control terminal of the first transistor receiving a first gate voltage and a control terminal of the second transistor receiving a second gate voltage. A first gate voltage control circuit generates the first gate voltage driving the control terminal of the first transistor and regulates the first gate voltage to keep the first transistor turned on. In response to the first gate voltage control circuit regulating the first gate voltage to a voltage value less than a first voltage level, the first gate voltage control circuit asserts a first signal to indicate a fault condition at the first transistor.Type: GrantFiled: February 7, 2022Date of Patent: November 7, 2023Assignee: Alpha and Omega Semiconductor International LPInventor: Michael Scheel
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Patent number: 11646570Abstract: A system and method in an electronic system including multiple serial ports, each coupled to a port controller circuit. In one embodiment, the method includes providing a monitor terminal at each port controller circuit, each monitor terminal having a first resistance value; connecting together electrically at least two of the monitor terminals of the port controller circuits of the multiple serial ports; and sensing, at each port controller circuit, a first voltage at the monitor terminal. In operation, when the first voltage is outside a predetermined voltage window, a first signal is generated at a first port controller circuit where the first signal has a state indicating a failure detected in at least one of the port controller circuits with connected monitor terminals.Type: GrantFiled: December 10, 2021Date of Patent: May 9, 2023Assignee: Alpha and Omega Semiconductor International LPInventor: Michael Scheel
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Publication number: 20220155838Abstract: A port controller circuit is configured to control power transfer on a power path between a first terminal and a second terminal. The controller circuit includes first and second transistors connected in series between the first terminal and the second terminal, a control terminal of the first transistor receiving a first gate voltage and a control terminal of the second transistor receiving a second gate voltage. A first gate voltage control circuit generates the first gate voltage driving the control terminal of the first transistor and regulates the first gate voltage to keep the first transistor turned on. In response to the first gate voltage control circuit regulating the first gate voltage to a voltage value less than a first voltage level, the first gate voltage control circuit asserts a first signal to indicate a fault condition at the first transistor.Type: ApplicationFiled: February 7, 2022Publication date: May 19, 2022Inventor: Michael Scheel
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Publication number: 20220102964Abstract: A system and method in an electronic system including multiple serial ports, each coupled to a port controller circuit. In one embodiment, the method includes providing a monitor terminal at each port controller circuit, each monitor terminal having a first resistance value; connecting together electrically at least two of the monitor terminals of the port controller circuits of the multiple serial ports; and sensing, at each port controller circuit, a first voltage at the monitor terminal. In operation, when the first voltage is outside a predetermined voltage window, a first signal is generated at a first port controller circuit where the first signal has a state indicating a failure detected in at least one of the port controller circuits with connected monitor terminals.Type: ApplicationFiled: December 10, 2021Publication date: March 31, 2022Inventor: Michael Scheel
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Patent number: 11269390Abstract: A port controller circuit implements monitoring and detection of power path short failures by regulating the control voltage to the power switches during the on-state of the power switches. A failure condition is indicated when the control voltage to a power switch is regulated to a voltage level outside of a permissible range. The port controller circuit implements real-time monitoring where a short within the power path can be detected while the power path is enabled and the fault condition can be used to disable other port controller circuits in a multi-port system. In one embodiment, a port controller circuit includes a pair of back-to-back transistors forming the power path and the real-time fault detection scheme is applied to control each transistor independently to determine if either transistor has a fault condition.Type: GrantFiled: June 26, 2020Date of Patent: March 8, 2022Assignee: Alpha and Omega Semiconductor International LPInventor: Michael Scheel
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Publication number: 20210405720Abstract: A port controller circuit implements monitoring and detection of power path short failures by regulating the control voltage to the power switches during the on-state of the power switches. A failure condition is indicated when the control voltage to a power switch is regulated to a voltage level outside of a permissible range. The port controller circuit implements real-time monitoring where a short within the power path can be detected while the power path is enabled and the fault condition can be used to disable other port controller circuits in a multi-port system. In one embodiment, a port controller circuit includes a pair of back-to-back transistors forming the power path and the real-time fault detection scheme is applied to control each transistor independently to determine if either transistor has a fault condition.Type: ApplicationFiled: June 26, 2020Publication date: December 30, 2021Inventor: Michael Scheel
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Publication number: 20210408780Abstract: A multi-port system and method implements fault detection using a resistor connected to each port controller where the resistors of at least two port controllers are connected together in parallel. Each port controller supplies a predetermined current to the associated resistor and senses the resistor voltage of the parallelly connected resistors to detect for a fault condition. A failure condition is indicated when the resistor voltage is outside of a given threshold window. In this manner, for a single point failure, such as a short along the power path of a port controller, the other port controller senses a change in the resistor voltage and can assert a fault signal. In one embodiment, the fault signal is an open drain output and operates to pull down on a fault bus, which disables all the port controllers in the system through a disable input.Type: ApplicationFiled: June 26, 2020Publication date: December 30, 2021Inventor: Michael Scheel
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Patent number: 11205894Abstract: A multi-port system and method implements fault detection using a resistor connected to each port controller where the resistors of at least two port controllers are connected together in parallel. Each port controller supplies a predetermined current to the associated resistor and senses the resistor voltage of the parallelly connected resistors to detect for a fault condition. A failure condition is indicated when the resistor voltage is outside of a given threshold window. In this manner, for a single point failure, such as a short along the power path of a port controller, the other port controller senses a change in the resistor voltage and can assert a fault signal. In one embodiment, the fault signal is an open drain output and operates to pull down on a fault bus, which disables all the port controllers in the system through a disable input.Type: GrantFiled: June 26, 2020Date of Patent: December 21, 2021Assignee: Alpha and Omega Semiconductor International LPInventor: Michael Scheel
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Patent number: 10182786Abstract: The invention relates to a model for use in an imaging technique based on an interaction of the model with an electromagnetic radiation. The model comprises a plurality of volume elements. The interaction intensities of two neighboring volume elements are distinguishable by an imaging technique. The model comprises first volume elements made of a supporting material, and second volume elements are made of a supporting material and a contrast material and exhibit a higher interaction intensity with the electromagnetic radiation than the first volume elements because of the presence of contrast material. The second volume elements have been generated by a printing method. The invention further relates to a method for fabricating the model by 3D printing.Type: GrantFiled: March 8, 2018Date of Patent: January 22, 2019Inventors: Paul Jahnke, Michael Scheel
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Publication number: 20180192986Abstract: The invention relates to a model for use in an imaging technique based on an interaction of the model with an electromagnetic radiation. The model comprises a plurality of volume elements. The interaction intensities of two neighboring volume elements are distinguishable by an imaging technique. The model comprises first volume elements made of a supporting material, and second volume elements are made of a supporting material and a contrast material and exhibit a higher interaction intensity with the electromagnetic radiation than the first volume elements because of the presence of contrast material. The second volume elements have been generated by a printing method. The invention further relates to a method for fabricating the model by 3D printing.Type: ApplicationFiled: March 8, 2018Publication date: July 12, 2018Inventors: Paul Jahnke, Michael Scheel
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Patent number: 9924919Abstract: The invention relates to a model for use in an imaging technique based on an interaction of the model with an electromagnetic radiation. The model comprises a plurality of volume elements. The interaction intensities of two neighboring volume elements are distinguishable by an imaging technique. The model comprises first volume elements made of a supporting material, and second volume elements are made of a supporting material and a contrast material and exhibit a higher interaction intensity with the electromagnetic radiation than the first volume elements because of the presence of contrast material. The second volume elements have been generated by a printing method. The invention further relates to a method for fabricating the model by 3D printing.Type: GrantFiled: November 23, 2015Date of Patent: March 27, 2018Inventors: Paul Jahnke, Michael Scheel
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Publication number: 20170042501Abstract: The invention relates to a model for use in an imaging technique based on an interaction of the model with an electromagnetic radiation. The model comprises a plurality of volume elements. The interaction intensities of two neighbouring volume elements are distinguishable by an imaging technique. The model comprises first volume elements made of a supporting material, and second volume elements are made of a supporting material and a contrast material and exhibit a higher interaction intensity with the electromagnetic radiation than the first volume elements because of the presence of contrast material. The second volume elements have been generated by a printing method. The invention further relates to a method for fabricating the model by 3D printing.Type: ApplicationFiled: November 23, 2015Publication date: February 16, 2017Inventors: Paul JAHNKE, Michael Scheel