Abstract: A silicon structure with improved protection against failures induced by excess radiation-induced charge carrier migration from the bulk region into the near-surface region. The structure comprises bulk and near-surface regions that are doped with a dopant, wherein the concentration in the near-surface region is at least 10 times the maximum concentration, c, of dopant in the bulk region. The structure further comprises a transition region between the bulk and near-surface regions extending less than about 1 ?m from the near-surface region toward the central plane.

Abstract: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer.

Abstract: This invention generally relates to a strained silicon on insulator (SSOI) structure, and to a process for making the same. The process includes forming a thin SiO2 layer on a strained silicon layer after it is formed on the donor wafer and before bonding to the handle wafer.

Abstract: This invention generally relates to strained silicon on insulator (SSOI) structure, and to a process for making the same. The process includes a high temperature thermal anneal of a SSOI structure to improve the crystallinity of the strained silicon layer, while maintaining the strain present therein.

Abstract: A heteroepitaxial semiconductor wafer includes a heteroepitaxial layer forming the front surface of the wafer that includes a secondary material having a different crystal structure than that of the wafer primary material. The heteroepitaxial layer is substantially free of defects. A surface layer includes the primary material and is free of the secondary material. The surface layer borders the heteroepitaxial layer. A bulk layer includes the primary material and is free of the secondary material. The bulk layer borders the surface layer and extends through the central plane. An SOI wafer and a method of making wafers is disclosed.