Patents by Inventor Michael Setton

Michael Setton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190281771
    Abstract: A method is disclosed. The method includes providing a first movable assembly that is movable between a first location and a second location of a structure, providing a second movable assembly that is movable between a third location and a fourth location of the structure, and disposing a first growth material in the first movable assembly and a second growth material in the second movable assembly. The method also includes illuminating the first growth material from a first position at the first location at a first time and from a second position at the second location at a second time, and illuminating the second growth material from a third position at the third location at the first time and from a fourth position at the fourth location at the second time.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 19, 2019
    Inventor: Michael Setton
  • Publication number: 20130278427
    Abstract: A method of reporting local environmental conditions in real time is implemented by providing a sensor that takes measurements of an environmental condition; attaching the sensor to a vehicle, a person, an object such as a street lamp or other structure; and displaying visible light to the public at a scale visible from at least 30 feet from the visible light. The visible light is controlled by a microcontroller receiving information from the sensor. The visible light is either variable to depict the measurements, such as in color, frequency of illumination, or is variable in a plurality of lamps lighted in accordance with the magnitude of the measurements or in accordance with a composite index. The sensor is preferably modular so that it can be swapped in and out of a printed circuit board.
    Type: Application
    Filed: July 10, 2012
    Publication date: October 24, 2013
    Inventor: Michael Setton
  • Patent number: 7042033
    Abstract: MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that comprises a material that is selected from the group consisting of Ta2O5, Ta2(O1?xNx)5 wherein x ranges from greater than 0 to 0.6, a solid solution of (Ta2O5)r—(TiO2)1?r wherein r ranges from about 0.9 to less than 1, a solid solution (Ta2O5)s—(Al2O3)1?s wherein s ranges from 0.9 to less than 1, a solid solution of (Ta2O5)t—(ZrO2)1?t wherein t ranges from about 0.9 to less than 1, a solid solution of (Ta2O5)u—(HfO2)1?u wherein u ranges from about 0.9 to less than 1, and mixtures thereof wherein the interfacial layer separates the high dielectric constant layer from the substrate; (b) a gate electrode having a width of less than 0.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: May 9, 2006
    Assignee: Lam Research Corporation
    Inventor: Michael Setton
  • Publication number: 20040087091
    Abstract: MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that comprises a material that is selected from the group consisting of Ta2O5, Ta2(O1−xNx)5 wherein x ranges from greater than 0 to 0.6, a solid solution of (Ta2O5)r—(TiO2)1−r wherein r ranges from about 0.9 to 1, a solid solution (Ta2O5)s—(Al2O3)1−s wherein s ranges from 0.9 to 1, a solid solution of (Ta2O5)t—(ZrO2)1−t wherein t ranges from about 0.9 to 1, a solid solution of (Ta2O5)u—(HfO2)1−u wherein u ranges from about 0.9 to 1, and mixtures thereof wherein the interfacial layer separates the high dielectric constant layer from the substrate; (b) a gate electrode having a width of less than 0.
    Type: Application
    Filed: July 21, 2003
    Publication date: May 6, 2004
    Applicant: Lam Research Corporation
    Inventor: Michael Setton
  • Patent number: 6727148
    Abstract: MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that comprises a material that is selected from the group consisting of Ta2O5, Ta2(O1−xNx)5 wherein x ranges from greater than 0 to 0.6, a solid solution of (Ta2O5)r—(TiO2)1−r wherein r ranges from about 0.9 to 1, a solid solution (Ta2O5)s—(Al2O3)1−s wherein s ranges from 0.9 to 1, a solid solution of (Ta2O5)t—(ZrO2)1−t wherein t ranges from about 0.9 to 1, a solid solution of (Ta2O5)u—(HfO2)1−u wherein u ranges from about 0.9 to 1, and mixtures thereof wherein the interfacial layer separates the high dielectric constant layer from the substrate; (b) a gate electrode having a width of less than 0.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: April 27, 2004
    Assignee: Lam Research Corporation
    Inventor: Michael Setton
  • Publication number: 20040070036
    Abstract: MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that comprises a material that is selected from the group consisting of Ta2O5, Ta2(O1-xNx)5 wherein x ranges from greater than 0 to 0.6, a solid solution of (Ta2O5)r—(TiO2)1-r wherein r ranges from about 0.9 to 1, a solid solution (Ta2O5)s—(Al2O3)1-s wherein s ranges from 0.9 to 1, a solid solution of (Ta2O5)t—(ZrO2)1-t wherein t ranges from about 0.9 to 1, a solid solution of (Ta2O5)u—(HfO2)1-u wherein u ranges from about 0.9 to 1, and mixtures thereof wherein the interfacial layer separates the high dielectric constant layer from the substrate; (b) a gate electrode having a width of less than 0.
    Type: Application
    Filed: July 21, 2003
    Publication date: April 15, 2004
    Applicant: Lam Research Corporation
    Inventor: Michael Setton