Patents by Inventor Michael Sheets

Michael Sheets has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11915329
    Abstract: An online agricultural system manages and optimizes interactions of entities within the system to enable the execution of transaction and the transportation of crop products. The online agricultural system accesses historic and environmental data describing factors that may impact crop product transactions and/or transportation to determine market prices for crop products and crop product transportation. Responsive to receiving a request from an entity, the online agricultural system determines an optimal transaction for the entity, such as a price for selling a crop product, an available crop product for purchase, or a transportation opportunity to transport a crop product.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: February 27, 2024
    Assignee: INDIGO AG, INC.
    Inventors: David Patrick Perry, Barry Loyd Knight, Eric Michael Jeck, Rachel Ariel Raymond, Neal Hitesh Rajdev, Geoffrey Albert von Maltzahn, Robert Berendes, Nathan Post, Philip Gabriel Sheets-Poling, Rodney Connor, Jonathan Hennek, Ean Shaughnessy Wahl Mullins
  • Publication number: 20190279321
    Abstract: Methods, apparatuses, and processor-executable instructions for proving public disclosure of an idea using blockchain technology are provided. For instance, in an aspect of the present disclosure, an example method performed by a controller for proving existence and public disclosure of an idea. In some examples, such an example method includes a controller entity receiving an idea from a source entity, proving existence of the idea by placing a representation of the idea on a first set of blockchains, and proving public availability of the idea at one or more instances by placing a representation of a state of a database of publicly served ideas on a second set of blockchains.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 12, 2019
    Inventors: Eli Michael Sheets, Kitrick Brian Sheets
  • Patent number: 9949495
    Abstract: A sliced jumbo tender of a meat tender or poultry breast resulting in strips having a desired weight and thickness with minimal losses. The sliced tender includes two diagonal cuts across and through the tender to yield three strips which are substantially the same in weight and thickness.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: April 24, 2018
    Assignee: MAS MARKETING HOLDING COMPANY, LLC
    Inventors: Mike Ensley, Andres Garcia, Gordon Tatro, Michael Sheets, Mark Sosebee
  • Publication number: 20170231238
    Abstract: A sliced jumbo tender of a meat tender or poultry breast resulting in strips having a desired weight and thickness with minimal losses. The sliced tender includes two diagonal cuts across and through the tender to yield three strips which are substantially the same in weight and thickness.
    Type: Application
    Filed: January 30, 2017
    Publication date: August 17, 2017
    Inventors: Mike Ensley, Andres Garcia, Gordon Tatro, Michael Sheets, Mark Sosebee
  • Patent number: 9629373
    Abstract: A method of processing a jumbo tender of a meat tender or poultry breast into strips having a desired weight and thickness with minimal losses requires two diagonal cuts across and through the jumbo to yield three portions which are substantially the same in weight and thickness.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: April 25, 2017
    Assignee: MAS Marketing Holding Company, LLC
    Inventors: Mike Ensley, Andres Garcia, Gordon Tatro, Michael Sheets, Mark Sosebee
  • Publication number: 20160183540
    Abstract: A method of processing a jumbo tender of a meat tender or poultry breast into strips having a desired weight and thickness with minimal losses requires two diagonal cuts across and through the jumbo to yield three portions which are substantially the same in weight and thickness.
    Type: Application
    Filed: December 3, 2015
    Publication date: June 30, 2016
    Inventors: Mike Ensley, Andres Garcia, Gordon Tatro, Michael Sheets, Mark Sosebee
  • Patent number: 9298531
    Abstract: A method and apparatus to operate a watchdog timer having a first time out period in a processing system. The watchdog timer receives an indication of a change in a mode of operation in the processing system. In response to the change in the mode of operation of the processing system, the watchdog timer changes the time out period to a second time out period corresponding to the new mode of operation.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: March 29, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, David G. Wright
  • Patent number: 8977911
    Abstract: A method and apparatus to operate a watchdog timer having a first time out period in a processing system. The watchdog timer receives an indication of a change in a mode of operation in the processing system. In response to the change in the mode of operation of the processing system, the watchdog timer changes the time out period to a second time out period corresponding to the new mode of operation.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: March 10, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, David G. Wright
  • Patent number: 8832475
    Abstract: A system includes a context file to store multiple contexts corresponding to different power modes of an electronic system, and a domain control device to generate control signals based, at least in part, on a context from the context file. The electronic system is configured to transition to a power mode corresponding to the context responsive to the control signals.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: September 9, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Michael Sheets
  • Patent number: 8705309
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: April 22, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, Timothy John Williams
  • Publication number: 20130336081
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 19, 2013
    Inventors: Michael Sheets, Timothy J. Williams
  • Patent number: 8462576
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element. Multiple state-monitoring memory elements may be disturbed in different locations on the IC for better coverage.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: June 11, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, Timothy Williams
  • Patent number: 8375258
    Abstract: A method and apparatus to operate a watchdog timer having a first time out period in a processing system. The watchdog timer receives an indication of a change in a mode of operation in the processing system. In response to the change in the mode of operation of the processing system, the watchdog timer changes the time out period to a second time out period corresponding to the new mode of operation.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: February 12, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, David G. Wright
  • Publication number: 20120176854
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element. Multiple state-monitoring memory elements may be disturbed in different locations on the IC for better coverage.
    Type: Application
    Filed: November 22, 2011
    Publication date: July 12, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Michael Sheets, Timothy Williams
  • Patent number: 8111577
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: February 7, 2012
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, Timothy Williams
  • Patent number: 8064281
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: November 22, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michael Sheets, Timothy Williams
  • Publication number: 20080259702
    Abstract: Embodiments of the invention relate to a state-monitoring memory element. The state-monitoring memory element may have a reduced ability to retain a logic state than other regular memory elements on an IC. Thus, if the state-monitoring memory elements fails or loses state during testing, it may be a good indicator that the IC's state retention may be in jeopardy, possibly requiring the IC to be reset. The state-monitoring memory element may be implemented by degrading an input voltage supply to the state-monitoring memory element across a diode and/or a transistor. One or more current sources may be used to stress the state-monitoring memory element. A logic analyzer may be used to analyze the integrity of the state-monitoring memory element and trigger appropriate actions in the IC, e.g., reset, halt, remove power, interrupt, responsive to detecting a failure in the state-monitoring memory element.
    Type: Application
    Filed: September 19, 2007
    Publication date: October 23, 2008
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Michael Sheets, Timothy Williams