Abstract: A system employing vector signal generator (VSG) and vector signal analyzer (VSA) modules or cards that are configured to test multiple devices under test simultaneously. Each VSG is configured to generate multiple RF test signals and send them to multiple devices under test simultaneously. Similarly, each VSA is configured with multiple signal receiving modules connected to a single controller or memory. Each signal receiving module receives an RF signal from a device under test, converts it to a baseband digital signal, and transmits this digital signal to the VSA's memory. A single RF testing system can employ multiple such VSGs and VSAs, each capable of evaluating multiple devices under test. Each VSG/VSA can further be tuned for operation in discrete or defined frequency bands, which are narrower than those for conventional RF testers, and which can correspond to various wireless standards.

Abstract: A system for parallel radio frequency (RF) testing. The system includes a plurality of signal generators, a plurality of signal analyzers, a data bus connected to the plurality of signal generators, and a controller. The controller has a connection to the data bus so as to be in electronic communication with the plurality of signal generators, and has a plurality of point to point links to respective ones of the signal analyzers so as to be in electronic communication with the plurality of signal analyzers.

Abstract: A system for parallel radio frequency (RF) testing. The system includes a plurality of signal generators, a plurality of signal analyzers, a data bus connected to the plurality of signal generators, and a controller. The controller has a connection to the data bus so as to be in electronic communication with the plurality of signal generators, and has a plurality of point to point links to respective ones of the signal analyzers so as to be in electronic communication with the plurality of signal analyzers.

Abstract: A system employing vector signal generator (VSG) and vector signal analyzer (VSA) modules or cards that are configured to test multiple devices under test simultaneously. Each VSG is configured to generate multiple RF test signals and send them to multiple devices under test simultaneously. Similarly, each VSA is configured with multiple signal receiving modules connected to a single controller or memory. Each signal receiving module receives an RF signal from a device under test, converts it to a baseband digital signal, and transmits this digital signal to the VSA's memory. A single RF testing system can employ multiple such VSGs and VSAs, each capable of evaluating multiple devices under test. Each VSG/VSA can further be tuned for operation in discrete or defined frequency bands, which are narrower than those for conventional RF testers, and which can correspond to various wireless standards.

Abstract: Certain example embodiments disclosed herein relate to multi-chip module (MCM) packages that include external and internal electrostatic discharge (ESD) protection circuits, and/or methods of making the same. In certain example embodiments, ESD protection circuits are located under the IO pads in the MCM package, the size of the internal dies' ESD circuits are reduced (e.g., by making them as small as possible in certain example implementations), and high-immunity ESD circuits are provided to the IO pads where they are exposed to the external environment. The external ESD protection circuits may provide a higher level of voltage protection than the internal ESD protection circuits. Thus, the external ESD protection circuits may provide shock protection from human body model shocks, whereas the internal ESD protection circuits may provide protection from machine or assembly model shocks.

Abstract: Certain example embodiments disclosed herein relate to multi-chip module (MCM) packages that include external and internal electrostatic discharge (ESD) protection circuits, and/or methods of making the same. In certain example embodiments, ESD protection circuits are located under the IO pads in the MCM package, the size of the internal dies' ESD circuits are reduced (e.g., by making them as small as possible in certain example implementations), and high-immunity ESD circuits are provided to the IO pads where they are exposed to the external environment. The external ESD protection circuits may provide a higher level of voltage protection than the internal ESD protection circuits. Thus, the external ESD protection circuits may provide shock protection from human body model shocks, whereas the internal ESD protection circuits may provide protection from machine or assembly model shocks.