Patents by Inventor Michael Simcoe

Michael Simcoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240275339
    Abstract: Systems and methods for thermal droop compensation in power amplifiers with field effect transistors (FETs) are disclosed. In one aspect, a droop compensation circuit having a heat-sensitive element is embedded in an amplifier in the amplifier chain. The heat-sensitive element tracks changes in temperature for the amplifier and generates a trigger signal for a correction circuit that modifies the amplifier chain to provide thermal droop compensation. Variations contemplate changes to the nature and location of the correction circuit. By compensating for temperature droop in this fashion, rapid pulsing signals that generate rapid pulses of heat may be transmitted across an effectively linear power amplifier chain without having to deal with droop effects. Particular aspects of a FET-based power amplifier may use diodes as a heat-sensitive element.
    Type: Application
    Filed: November 27, 2023
    Publication date: August 15, 2024
    Inventors: John Bellantoni, Michael Kevin O'Neal, Michael Simcoe
  • Patent number: 10978411
    Abstract: An RF power package includes a substrate having a metallized part and an insulating part, an RF power transistor die embedded in or attached to the substrate, the RF power transistor die having a die input terminal, a die output terminal, an input impedance and an output impedance, a package input terminal formed in the metallized part or attached to the insulating part of the substrate, a package output terminal formed in the metallized part or attached to the insulating part of the substrate, and a first plurality of planar tuning lines formed in the metallized part of the substrate and electrically connecting the die output terminal to the package output terminal. The first plurality of planar tuning lines is shaped so as to transform the output impedance at the die output terminal to a higher target level at the package output terminal.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: April 13, 2021
    Assignee: Infineon Technologies AG
    Inventor: Michael Simcoe
  • Publication number: 20180145043
    Abstract: An RF power package includes a substrate having a metallized part and an insulating part, an RF power transistor die embedded in or attached to the substrate, the RF power transistor die having a die input terminal, a die output terminal, an input impedance and an output impedance, a package input terminal formed in the metallized part or attached to the insulating part of the substrate, a package output terminal formed in the metallized part or attached to the insulating part of the substrate, and a first plurality of planar tuning lines formed in the metallized part of the substrate and electrically connecting the die output terminal to the package output terminal. The first plurality of planar tuning lines is shaped so as to transform the output impedance at the die output terminal to a higher target level at the package output terminal.
    Type: Application
    Filed: November 18, 2016
    Publication date: May 24, 2018
    Inventor: Michael Simcoe
  • Patent number: 9629246
    Abstract: A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: April 18, 2017
    Assignee: Infineon Technologies AG
    Inventors: Qianli Mu, Cristian Gozzi, Michael Simcoe, Guillaume Bigny
  • Publication number: 20170034913
    Abstract: A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 2, 2017
    Inventors: Qianli Mu, Cristian Gozzi, Michael Simcoe, Guillaume Bigny