Patents by Inventor Michael Sluyski

Michael Sluyski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12362832
    Abstract: A method, system, and apparatus for parsing incoming frames; classifying the frames by information contained in a header of the ethernet frame; and performing an action on the classification.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: July 15, 2025
    Inventor: Michael Sluyski
  • Patent number: 11728893
    Abstract: A method, system, and apparatus for parsing incoming frames; classifying the frames by information contained in a header of the ethernet frame; and performing an action on the classification.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 15, 2023
    Assignee: Acacia Communications, Inc.
    Inventor: Michael Sluyski
  • Patent number: 11418313
    Abstract: A system, method, and apparatus enabling synchronous and asynchronous data sources to be demapped from an oFrame container using a generic mapping system.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: August 16, 2022
    Assignee: Acacia Communications, Inc.
    Inventors: Michael Sluyski, Pierre Humblet, James Duda
  • Patent number: 10979209
    Abstract: A method, system, and apparatus for transmitting information over an coherent optical link comprising enabling synchronous and asynchronous data sources to be mapped together into a single payload using a generic mapping system which performs decoupling of a clock from each data source, and mapping data from each data source into a tributary of an oFrame.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: April 13, 2021
    Assignee: Acacia Communications, Inc.
    Inventors: Michael Sluyski, Pierre Humblet, James Duda
  • Patent number: 6425107
    Abstract: An encoder/decoder is disclosed which is operative to convert an 8 bit value to a ten bit serial run length limited code for transmission over a serial data link. The encoding technique maintains DC balance within 2 bits over a single ten bit word and compensates for DC imbalance by inverting selected words in the transmission sequence to correct for a DC imbalance resulting from the transmission of a prior unbalanced word. One or more encoding lookup tables are employed at the encoder to map each byte into a ten bit run length limited code for serialization and transmission over the serial data link. A second decoding lookup table is employed at the decoder to map the received 10 bit run length limited code into the original 8 bit value.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: July 23, 2002
    Assignees: Fujitsu Network Communications, Inc., Fujitsu Limited
    Inventors: Stephen A. Caldara, Raymond L. Strouble, Michael Sluyski
  • Patent number: 6195764
    Abstract: An encoder/decoder is disclosed which is operative to convert an 8 bit value to a ten bit serial run length limited code for transmission over a serial data link. The encoding technique maintains DC balance within 2 bits over a single ten bit word and compensates for DC imbalance by inverting selected words in the transmission sequence to correct for a DC imbalance resulting from the transmission of a prior unbalanced word. One or more encoding lookup tables are employed at the encoder to map each byte into a ten bit run length limited code for serialization and transmission over the serial data link. A second decoding lookup table is employed at the decoder to map the received 10 bit run length limited code into the original 8 bit value.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: February 27, 2001
    Assignees: Fujitsu Network Communications, Inc., Fujitsu Limited
    Inventors: Stephen A. Caldara, Michael Sluyski, Raymond L. Strouble