Patents by Inventor Michael Soulie
Michael Soulie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11907156Abstract: According to one aspect, provision is made of a system-on-chip comprising a master device, a slave device, a clock configured to clock the operation of the slave device, a clock controller configured to activate or deactivate the clock and/or a power-on controller configured to power on/off the slave device, a control system configured to detect that the clock is deactivated and/or that the slave device is powered off when the master device emits an access request to the slave device, the master device being configured for activating the clock when the control system detects that this clock is deactivated and/or powering on the slave device when the control system detects that the slave device is powered off, then emitting a new access request to the slave device.Type: GrantFiled: December 3, 2021Date of Patent: February 20, 2024Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics FranceInventors: Michael Soulie, Thomas Martin
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Patent number: 11775037Abstract: The method for resetting a master device, configured to initiate transactions on a bus of a system on a chip, includes monitoring a completed or not state of the transactions initiated by the master device. In the case of reception of a command to reset the master device, the method includes a transmission of an effective reset command to the master device when the transactions initiated by the master device are in the completed state.Type: GrantFiled: December 1, 2021Date of Patent: October 3, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Grand Ouest) SASInventors: Loic Pallardy, Michael Soulie
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Publication number: 20220179659Abstract: The method for resetting a master device, configured to initiate transactions on a bus of a system on a chip, includes monitoring a completed or not state of the transactions initiated by the master device. In the case of reception of a command to reset the master device, the method includes a transmission of an effective reset command to the master device when the transactions initiated by the master device are in the completed state.Type: ApplicationFiled: December 1, 2021Publication date: June 9, 2022Inventors: Loic Pallardy, Michael Soulie
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Publication number: 20220179822Abstract: According to one aspect, provision is made of a system-on-chip comprising a master device, a slave device, a clock configured to clock the operation of the slave device, a clock controller configured to activate or deactivate the clock and/or a power-on controller configured to power on/off the slave device, a control system configured to detect that the clock is deactivated and/or that the slave device is powered off when the master device emits an access request to the slave device, the master device being configured for activating the clock when the control system detects that this clock is deactivated and/or powering on the slave device when the control system detects that the slave device is powered off, then emitting a new access request to the slave device.Type: ApplicationFiled: December 3, 2021Publication date: June 9, 2022Inventors: Michael Soulie, Thomas Martin
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Patent number: 10540277Abstract: A method comprising: receiving a transaction associated with an address and having a transaction destination, said address being in an interleaved region of a memory; determining one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations; and associating routing information to said transaction, said routing information associated with the determined destination.Type: GrantFiled: October 15, 2014Date of Patent: January 21, 2020Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS S.R.L.Inventors: Michael Soulie, Riccardo Locatelli, Valerio Catalano, Giuseppe Maruccia, Giuseppe Guarnaccia, Raffaele Guarrasi
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Patent number: 10419432Abstract: An apparatus has a data store configured to store access activity information. The access activity information indicates which one or more of a plurality of different access parameter sets is active. The data store is also configured to store access defining information, which defines, at least for each active access parameter set, a number of channels, location information of said channels, and interleaving information associated with said channels.Type: GrantFiled: October 17, 2014Date of Patent: September 17, 2019Assignees: STMicroelectronics SA, STMicroelectronics (Grenoble2) SAS, STMicroelectronics S.R.L.Inventors: Michael Soulie, Riccardo Locatelli, Valerio Catalano, Hajer Ferjani, Giuseppe Maruccia, Raffaele Guarrasi, Giuseppe Guarnaccia
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Patent number: 9660936Abstract: A method includes setting a first indicator to a first value, which causes an apparatus to stop receiving traffic from a traffic source. At least one register is accessed to read or write at least one new value, and a second indicator is set indicating that accessing of the at least one register has completed. The first indicator is set to a second value. When the first indicator has the second value and the second indicator is set, the apparatus is again allowed to receive traffic from the traffic source.Type: GrantFiled: October 16, 2014Date of Patent: May 23, 2017Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS S.R.L.Inventors: Riccardo Locatelli, Michael Soulie, Francesco Giotta, Raffaele Guarrasi, Giuseppe Guarnaccia
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Patent number: 9461913Abstract: Embodiments relate to a method for transmitting a message in a data path of a network, the method includes transmitting a message onto an input bus of an input interface module, the message being received in flits of a size corresponding to the width of the input bus and generating a validity indicator for each elementary flit constituting each flit received. The message is transmitted onto an output bus of the input interface module towards a receiving interface module in flits of a size corresponding to the width of the output bus along with each validity indicator generated in association with the corresponding elementary flit. The receiving interface module receives flits constituting the message and the associated validity indicators and rejects a received flit if an elementary flit of the received flit is associated with a validity indicator in the invalid state.Type: GrantFiled: May 14, 2013Date of Patent: October 4, 2016Assignee: STMicroelectronics (Grenoble 2) SASInventors: Michael Soulie, Riccardo Locatelli, Antonio-Marcello Coppola
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Publication number: 20160246714Abstract: A method comprising: receiving a transaction associated with an address and having a transaction destination, said address being in an interleaved region of a memory; determining one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations; and associating routing information to said transaction, said routing information associated with the determined destination.Type: ApplicationFiled: October 15, 2014Publication date: August 25, 2016Inventors: Michael Soulie, Riccardo Locatelli, Valerio Catalano, Giuseppe Maruccia, Giuseppe Guarnaccia, Raffaele Guarrasi
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Publication number: 20160226878Abstract: An apparatus has a data store configured to store access activity information. The access activity information indicates which one or more of a plurality of different access parameter sets is active. The data store is also configured to store access defining information, which defines, at least for each active access parameter set, a number of channels, location information of said channels, and interleaving information associated with said channels.Type: ApplicationFiled: October 17, 2014Publication date: August 4, 2016Inventors: Michael Soulie, Riccardo Locatelli, Valerio Catalano, Hajer Ferjani, Giuseppe Maruccia, Raffaele Guarrasi, Giuseppe Guarnaccia
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Publication number: 20150109916Abstract: A method includes setting a first indicator to a first value, which causes an apparatus to stop receiving traffic from a traffic source. At least one register is accessed to read or write at least one new value, and a second indicator is set indicating that accessing of the at least one register has completed. The first indicator is set to a second value. When the first indicator has the second value and the second indicator is set, the apparatus is again allowed to receive traffic from the traffic source.Type: ApplicationFiled: October 16, 2014Publication date: April 23, 2015Inventors: Riccardo Locatelli, Michael Soulie, Francesco Giotta, Raffaele Guarrasi, Giuseppe Guarnaccia
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Publication number: 20130301643Abstract: Embodiments relate to a method for transmitting a message in a data path of a network, the method includes transmitting a message onto an input bus of an input interface module, the message being received in flits of a size corresponding to the width of the input bus and generating a validity indicator for each elementary flit constituting each flit received. The message is transmitted onto an output bus of the input interface module towards a receiving interface module in flits of a size corresponding to the width of the output bus along with each validity indicator generated in association with the corresponding elementary flit. The receiving interface module receives flits constituting the message and the associated validity indicators and rejects a received flit if an elementary flit of the received flit is associated with a validity indicator in the invalid state.Type: ApplicationFiled: May 14, 2013Publication date: November 14, 2013Inventors: Michael Soulie, Riccardo Locatelli, Antonio-Marcello Coppola
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Patent number: 7940788Abstract: A system is for transmitting data in a network and includes emitter nodes, each including a transmitter for transmitting requests for data transmission. The system may also include a receiver node receiving the data transmission from the emitter nodes and including a first memory for storing data transmitted by each emitter node, a second memory for storing the requests, and a transmitter. The data may be transmitted from the emitter nodes to the receiver node when memory space is available in the first memory to receive data. The transmitter of the receiver node may transmit to each emitter node an acknowledgement message when memory space is available in the first memory to receive at least a portion of the data transmitted. Each emitter node may establish a communication link with the receiver node and transmits the data based upon the acknowledgement message. The communication link may be locked until all data is transmitted.Type: GrantFiled: January 28, 2008Date of Patent: May 10, 2011Assignee: STMicroelectronics SAInventors: Michael Soulie, Riccardo Locatelli, Marcello Coppola
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Publication number: 20080181115Abstract: A system is for transmitting data in a network and includes emitter nodes, each including a transmitter for transmitting requests for data transmission. The system may also include a receiver node receiving the data transmission from the emitter nodes and including a first memory for storing data transmitted by each emitter node, a second memory for storing the requests, and a transmitter. The data may be transmitted from the emitter nodes to the receiver node when memory space is available in the first memory to receive data. The transmitter of the receiver node may transmit to each emitter node an acknowledgement message when memory space is available in the first memory to receive at least a portion of the data transmitted. Each emitter node may establish a communication link with the receiver node and transmits the data based upon the acknowledgement message. The communication link may be locked until all data is transmitted.Type: ApplicationFiled: January 28, 2008Publication date: July 31, 2008Applicant: STMicroelectronics SAInventors: Michael SOULIE, Riccardo Locatelli, Marcello Coppola