Abstract: A display controller includes first and second arbitrating units, a pixel data calculating unit, a latency measurement unit, and a clock divider. The first and second arbitrating units fetch first and second pixel data corresponding to at least one pixel from an external memory via a system bus. The pixel data calculating unit determines a size of the first and second pixel data. The latency measuring unit generates a first data rate value that is indicative of a latency of the system bus based on the size of the first and second pixel data. The clock divider receives a first clock signal modulation value corresponding to the first data rate value and alters a modulation of a reference clock signal. The graphics blending unit receives the first and second pixel data and provides blended pixel data to a display panel based on a modulated clock signal.

Abstract: A safety critical apparatus comprises a set of safety relevant modules; one or more comfort modules having one or more user interfaces; and a distraction controlling device arranged to adapt at least one of the one or more user interfaces to a current situation of operation of the safety critical apparatus.

Abstract: A communication apparatus for preventing the broadcasting of unauthorised messages on a broadcast bus network, the communication apparatus comprising: a first memory adapted to store first information; a second memory adapted to store second information; a monitoring unit adapted to: monitor the bus for processing messages being broadcasted on the bus, and output a third information and fourth information a comparing unit adapted to compare the first information with the third information and the second information with the fourth information; and, a message destroyer adapted to: when: the first information matches with the third information, and the second information does not match with the fourth information, causing the body of the current message to be altered while the current message is being broadcasted on the bus.

Abstract: The invention provides an apparatus and method for checking the integrity of visual display information and has particular application to checking images displayed in an automotive vehicle, such images containing safety critical information. The image intensity is checked only to an extent commensurate with a human being able to interpret its correct meaning. Hence, images which are defective in some way yet still recognisable by the human eye are not classified as failures. In one embodiment, a part of the image containing safety critical information is segmented into smaller areas and the luminance of pixels in each segmented area is compared with a threshold brightness level and a threshold darkness level. A histogram for each area is generated and compared with a reference.

Abstract: The invention provides an apparatus and method which allows identification of the system which provided images for each pixel of a touchscreen display which displays merged images of arbitrary shapes supplied from a plurality of systems. It further allows routing of user inputs to the appropriate system for further processing. Colour keying may be used to superimpose one image onto another. The invention finds particular application in the automotive field where images produced by an infotainment system may be merged with those produced by a mobile phone onto the in-vehicle display screen.

Abstract: A device securely accesses data in a memory via an addressing unit which provides a memory interface for interfacing to a memory, a core interface for interfacing to a core processor and a first and second security interface. The device includes a security processor HSM for performing at least one security operation on the data and a remapping unit MMAP. The remapping unit enables the security processor to be accessed by the core processor via the first security interface and to access the memory device via the second security interface according to a remapping structure for making accessible processed data based on memory data. The device provides a clear view on encrypted memory data without requiring system memory for storing the clear data.

Abstract: A memory controller used to verify authenticity of data stored in a first memory unit. The memory controller includes a secure memory unit which stores a pre-stored value representative of the authenticity of the data to be written in the first memory unit. A processing system calculates a value which is representative of the data in the first memory unit after a write cycle. The calculation of the calculated value is triggered by the write cycle. The calculated value is compared with the pre-stored value in order to verify whether the data stored in the first memory unit after the write cycle has been altered in accordance with the authenticity. By comparing the calculated value with the pre-stored value authenticity of the data stored in the first memory unit after the write cycle is verified, thus preventing the memory controller from operating in case the data written to the first memory unit is not authentic.

Abstract: A compute engine is arranged to retrieve a block of image data corresponding to a rectangular image region; calculate integral image values for all pixels of the block of image data to obtain an integral image of the block of image data; and store the integral image of the block in the one or more memories. The main processor determines which blocks of image data comprise pixels of the predefined rectangular region of the image, and defines a respective rectangular region part as the pixels of the block that belong to the predefined rectangular region of the image; calculate a HAAR feature of the rectangular region part for each block of image data that comprise pixels of the predefined rectangular region of the image; and add the HAAR features of the rectangular region parts to obtain the HAAR feature of the predefined rectangular region of the image.

Abstract: A display processor device is for processing display image data by overlaying a multitude of image layers. Pixel values of at least one of the image layers are stored in a memory and may comprise pixels values having a single predefined value, such as transparency. The display processor has a fetch unit for selectively fetching stored pixel values from the memory by skipping stored pixels values having the single predefined value according to a fetch mask indicative of pixels values having the single predetermined value. Advantageously the bandwidth for accessing the memory is reduced, because less pixel data values need be retrieved. Power consumption may be reduced, and slower memories may be applied.

Abstract: An audio unit, connected or connectable to a safety-critical apparatus, or integrated or integrable in the apparatus, is proposed. The audio unit may comprise a driver unit, a detection unit, and an alert unit. The driver unit may generate an analog audio signal in response to a request from the apparatus, to drive an acoustic output unit and thereby generate an acoustic signal for a user of the apparatus. The detection unit may detect the audio signal. The alert unit may generate an alert signal in response to the request if the detection unit has not detected the audio signal. It can thus be checked whether the acoustic signal is generated. A method for generating a safety critical acoustic signal is also described.

Abstract: A multi-layer display system for displaying images including a compressed image, in multiple planes, in a single frame, includes a compressed image decoder for decoding the compressed image, multiple arbiters for reading the decoded image data, and a decoder arbitration and semaphore control unit for splitting the compressed image into segments, assigning the segments to ones of the multiple planes, and allowing at least one arbiter to access the compressed image decoder to read the decoded data of the segment assigned to a plane mapped with the arbiter when the segment is being decoded.

Abstract: Methods and systems for facilitating viewing of information by machine users associated with machines, such as vehicle users in vehicles, are disclosed. In one example embodiment, a method for facilitating viewing of first information comprises (a) determining second information concerning a viewing direction of the machine user, and (b) adapting at least one operation of at least one display device so as to display the first information. Also, in an additional example embodiment, the method further comprises (c) additionally determining whether a first condition has been met, where the first condition is indicative of whether the machine user has failed to view in a sufficient manner the first information for or during a first predetermined amount of time. Additionally, the method comprises (d), upon the first condition being additionally determined to have been met, one or both of (i) repeating (a), (b), and (c), and (ii) outputting a signal configured to be sensed by the machine user.

Abstract: A display control unit is connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display. The display control unit may include a first memory unit arranged to buffer a set of image descriptors; a second memory unit connected between said first memory unit and said display; an update unit connected to said first memory unit and arranged to update said image descriptors in said first memory unit and to generate a proceed signal only when said set of image descriptors in said first memory unit is up to date; a copy unit arranged to copy said image descriptors from said first memory unit to said second memory unit in response to said proceed signal; and a video unit arranged to generate said video signal on the basis of said image descriptors in said second memory unit.

Abstract: A diagnostic data generation apparatus for a display controller comprises an underrun detector arranged to monitor, when in use, buffer depletion in order to detect an underrun condition. The underrun condition results from a data feed lag associated with a mismatch between a buffer fill rate and a predetermined output data rate.

Abstract: A built-in self test system comprises an integrated circuit device comprising a plurality of functional units coupled to built-in self test circuitry; a low power control unit operable to switch the integrated circuit device into a low power mode and to generate a BIST wake-up signal during or before entering the low power mode; and a built-in self test control unit coupled to the built-in self test circuitry and the low power control unit and arranged to initiate a built-in self test when receiving the BIST wake-up signal.

Abstract: A display controller comprising a blending stage and a blending controller. The blending stage is provided for blending multiple image layers into one display output image and comprises a plurality of input channels for receiving pixel data for the multiple image layers. The blending stage further comprises multiple blenders for combining the pixel data received by at least two input channels of the plurality of input channels. The blending controller is coupled to the blending stage for controlling operation of the blending stage. The blending stage further comprises a controllable switch for coupling an output of at least one blender of the multiple blenders to a display output of the blending stage for regular on-the-fly blending or to an offline blending memory for storing a result of an offline blending task.

Abstract: Methods and systems for facilitating viewing of information by machine users associated with machines, such as vehicle users in vehicles, are disclosed. In one example embodiment, a method for facilitating viewing of first information comprises (a) determining second information concerning a viewing direction of the machine user, and (b) adapting at least one operation of at least one display device so as to display the first information. Also, in an additional example embodiment, the method further comprises (c) additionally determining whether a first condition has been met, where the first condition is indicative of whether the machine user has failed to view in a sufficient manner the first information for or during a first predetermined amount of time. Additionally, the method comprises (d), upon the first condition being additionally determined to have been met, one or both of (i) repeating (a), (b), and (c), and (ii) outputting a signal configured to be sensed by the machine user.

Abstract: A memory access controller for managing data flow between a memory unit and a processing unit is described. The memory access controller comprises an addressing unit and an unpacking unit. The addressing unit may receive an address from said processing unit and select a data location within said memory unit in dependence on that address. The unpacking unit may read a first word from the selected data location, unpack the first word into a second word by applying a data conversion scheme which depends on the received address, and provide the second word to the processing unit. The data conversion scheme may comprise, for at least one possible address, a pixel format conversion. A data processing system and a method are also proposed.

Abstract: A data processing system comprising at least a memory unit, a first client connected to the memory unit, and a second client connected to the memory unit is proposed. The first client may comprise a first memory access unit and an information unit. The first memory access unit may read data from or write data to the memory unit at a first data rate. The information unit may update internal data correlating with a minimum required value of the first data rate. The second client may comprise a second memory access unit and a data rate limiting unit. The second memory access unit may read data from or write data to the memory unit at a second data rate. The data rate limiting unit may limit the second data rate in dependence on the internal data. The first memory access unit may, for example, read data packets sequentially from the memory unit, and the information unit may update the internal data at least per data packet. A method of controlling access to a shared memory unit is also proposed.

Abstract: A memory device comprising a memory controller and a homogeneous memory accessible by the memory controller, wherein the homogeneous memory is divided by the memory controller in a first memory partition and a second memory partition, wherein the first memory partition is allocated to a first type of information comprising user data and ECC data that are arranged interleaved with the user data, and wherein the second memory partition is allocated to a second type of information comprising further user data.