Abstract: A computing device includes: an instruction cache storing primary execution unit instructions and auxiliary execution unit instructions in a sequential order; a primary execution unit configured to receive and execute the primary execution unit instructions from the instruction cache; an auxiliary execution unit configured to receive and execute only the auxiliary execution unit instructions from the instruction cache in a manner independent from and asynchronous to the primary execution unit; and completion circuitry configured to coordinate completion of the primary execution unit instructions by the primary execution unit and the auxiliary execution unit instructions according to the sequential order.

Abstract: A computing device includes: an instruction cache storing primary execution unit instructions and auxiliary execution unit instructions in a sequential order; a primary execution unit configured to receive and execute the primary execution unit instructions from the instruction cache; an auxiliary execution unit configured to receive and execute only the auxiliary execution unit instructions from the instruction cache in a manner independent from and asynchronous to the primary execution unit; and completion circuitry configured to coordinate completion of the primary execution unit instructions by the primary execution unit and the auxiliary execution unit instructions according to the sequential order.

Abstract: A system and method for improving the performance and efficiency of multi-clock-domain data transmission interfaces. The data transmission interface may include a modified slave latch which includes one or more clock splitters and one or more transmission gates may be used. By having such a configuration, space requirements are reduced and a reduction of the number of devices necessary for a multi-domain interface may be realized. The configuration may further allow for independent cycle stealing of N:1 and N:2 logical paths, thus allowing for timing resolution solutions that use fewer devices versus implementations that require the tuning of each individual bit in the cross-clock-domain interface. By implementing such a data transmission interface, space and power requirements may be reduced and timing criticalities may be more easily managed.

Abstract: Embodiments include a cache controller adapted to determine whether a memory line for which the processor is to issue an address-only kill request resides in a fill buffer for the cache line in a shared state. If so, the cache controller may mark the fill buffer as not having completed bus transactions and issue the address-only kill request for that fill buffer. The address-only kill request may transmit to other processors on the bus and the other processors may respond by invalidating the cache entries for the memory line. Upon confirmation from the other processors, a bus arbiter may confirm the kill request, promoting the memory line already in that fill buffer to exclusive state. Once promoted, the fill buffer may be marked as having completed the bus transactions and may be written into the cache.

Abstract: A system and method for improving the performance and efficiency of multi-clock-domain data transmission interfaces. The data transmission interface may include a modified slave latch which includes one or more clock splitters and one or more transmission gates may be used. By having such a configuration, space requirements are reduced and a reduction of the number of devices necessary for a multi-domain interface may be realized. The configuration may further allow for independent cycle stealing of N:1 and N:2 logical paths, thus allowing for timing resolution solutions that use fewer devices versus implementations that require the tuning of each individual bit in the cross-clock-domain interface. By implementing such a data transmission interface, space and power requirements may be reduced and timing criticalities may be more easily managed.

Abstract: Systems and arrangements promoting a line from shared to exclusive in cache are contemplated. Embodiments include a cache controller adapted to determine whether a memory line for which the processor is to issue an address-only kill request resides in a fill buffer for the cache line in a shared state. If so, the cache controller may mark the fill buffer as not having completed bus transactions and issue the address-only kill request for that fill buffer. The address-only kill request may transmit to other processors on the bus and the other processors may respond by invalidating the cache entries for the memory line. Upon confirmation from the other processors, a bus arbiter may confirm the kill request, promoting the memory line already in that fill buffer to exclusive state. Once promoted, the fill buffer may be marked as having completed the bus transactions and may be written into the cache.

Abstract: Embodiments include a cache controller adapted to determine whether a memory line for which the processor is to issue an address-only kill request resides in a fill buffer for the cache line in a shared state. If so, the cache controller may mark the fill buffer as not having completed bus transactions and issue the address-only kill request for that fill buffer. The address-only kill request may transmit to other processors on the bus and the other processors may respond by invalidating the cache entries for the memory line. Upon confirmation from the other processors, a bus arbiter may confirm the kill request, promoting the memory line already in that fill buffer to exclusive state. Once promoted, the fill buffer may be marked as having completed the bus transactions and may be written into the cache.

Abstract: A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.

Abstract: A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.

Abstract: A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.

Abstract: A vacuum toilet comprises a toilet bowl (1) and a vacuum pipeline (3) which opens out into said toilet bowl. In the region of the opening (2), the vacuum line (3) has a cross-sectional narrowing in the form of a foreign-body barrier (5) which projects radially into the line interior. Alternatively provided is an insert pipe part (6) which can be inserted into the vacuum pipeline (3) in the region of the opening (2) and has an above-described foreign-body barrier (5).

Abstract: A method and a device for controlling a robot on the basis of data from sensors with their own sensor data structures. For solving the problem of adapting to different sensors and their data structures and consequently permitting in simple manner the use of different sensors without intervening in the actual robot control program, according to the system the sensor data are processed to robot control data with a control data structure usable by a system control program and a processing device suitable for the same is provided.

Abstract: A method and system are described for deactivating a password requirement in a computer system included within a data processing system. The computer system requires the entry of a password in order to operate the computer system. A wireless signal is transmitted to the computer system such that computer system receives the signal. In response to a receipt of the wireless signal, the requirement that a password be entered is temporarily deactivated. The computer system is thus operable without the entry of the password.

Abstract: The invention is based on a method and a device for controlling a robot on the basis of data from sensors with their own sensor data structures. For solving the problem of adapting to different sensors and their data structures and consequently permitting in simple manner the use of different sensors without intervening in the actual robot control program, according to the invention the sensor data are processed to robot control data with a control data structure usable by a system control program and a processing means suitable for the same is provided.

Abstract: A method and system are described for booting a remote client computer system included within a data processing system. The data processing system includes a server computer system and at least one client computer system. A physical region is specified within which the client computer system resides. A wireless signal is transmitted to the physical region and is received by the client computer system. A determination is made whether the wireless signal includes a specification of the client computer system. If the wireless signal includes a specification of the client computer system, the client computer system boots and establishes an association with the server computer system as a client of the server computer system.

Abstract: A method and system are described for determining a physical location of a computer system included within a data processing system. A wireless signal is transmitted to a physical location within which a plurality of computer systems are located. In response to a receipt of the wireless signal, each computer system transmits an indication of its physical location.

Abstract: Beginning with a successive commanded end-effector destination shift, the method of the invention, which includes a calculation corresponding to a special algorithm of inverse kinematics using the Jacobi Matrix in the control of a manipulator, effects an optimization of weighted criteria (energy criteria, acceleration criteria and reference-position criteria) in a real-time cycle while reliably maintaining all path limitations and resulting in an optimized acceleration behavior. The method of the invention can be used in interactive path guidance of a manipulator and/or as a modular component of a superordinate task, such as for force-control objectives.

Abstract: A method of asset control and workstation computer deployment that utilizes a dual port electronic memory identification RFID tag to hold serial number and hardware and software configuration profiles as well as user information. The RFID tag is mapped into the workstation computer memory space and can also be read and written by radio frequency signalling through a wired plug and access flap in a shipping carton. Serial numbers and MAC address is stored on the tag by the manufacturer. User information, workstation profile and software image information is stored onto the tag while the computer is being received for forwarding to the final workstation destination without the need to unpack and power up the computer. The information stored on the tag is used to allow automated system configuration and software downloading to the computer.

Abstract: A data processing system and method are described for permitting a server computer system to generate a detailed repair request utilized to a remote client computer system. The server and client computer systems are coupled together utilizing a local area network. In response to an error in operation of the client caused by a malfunctioning part included within the client, the client identifies the malfunctioning part. The client automatically transmits a notification of the error and an identification of the part to the server without requiring a user's presence at the client. The server generates a detailed repair request which includes the identification of the part. The repair request is detailed including an identity of the malfunctioning part to be repaired and is generated remotely by the server without a user's presence at the client being required.

Abstract: A method of making an impeller having inner and outer portions of polyurethane resin having different flexibilities with the outer portion bonded to the inner portion and having greater flexibility than the inner portion, includes rotating a centrifugal casting mold containing a polyurethane resin forming material of predetermined composition, introducing into the inner portion of the mold another polyurethane resin forming composition of different composition than the first material, centrifugal casting the inner and outer portions together, and curing the resulting shape to form a disk having bonded inner and outer portions of polyurethane resin having different flexibilities.