Abstract: A unified queue configured to perform decoupled prediction and fetch operations, and related apparatuses, systems, methods, and computer-readable media, is disclosed. The unified queue has a plurality of entries, where each entry is configured to store information associated with at least one instruction, and where the information comprises an identifier portion, a prediction information portion, and a tag information portion. The unified queue is configured to update the prediction information portion of each entry responsive to a prediction block, and to update the tag information portion of each entry responsive to a tag and TLB block. The prediction information may be updated more than once, and the unified queue is configured to take corrective action where a later prediction conflicts with an earlier prediction.

Abstract: Mitigation of return stack buffer side channel attacks in a processor. Detecting a side channel attack or a fault in a return from a function call in the processor includes receiving a return exception level indication (or e.g., a return security level indication) indicating the exception level associated with the return and comparing the exception level associated with the return to the exception level (or security level) associated with the return address. The return exception level indicator may be received in conjunction with a return indication. The processing circuit accesses the first entry of the return stack buffer, which indicates the return address of the function call, and also accesses an exception level associated with the return address. The processing circuit compares the exception level associated with the return address to the exception level associated with the return to determine whether to use the return address in a prediction of instruction flow.

Abstract: A unified queue configured to perform decoupled prediction and fetch operations, and related apparatuses, systems, methods, and computer-readable media, is disclosed. The unified queue has a plurality of entries, where each entry is configured to store information associated with at least one instruction, and where the information comprises an identifier portion, a prediction information portion, and a tag information portion. The unified queue is configured to update the prediction information portion of each entry responsive to a prediction block, and to update the tag information portion of each entry responsive to a tag and TLB block. The prediction information may be updated more than once, and the unified queue is configured to take corrective action where a later prediction conflicts with an earlier prediction.