Abstract: A method includes obtaining, using at least one processing device of an electronic device, information defining a combinatorial logic gate design for a combinatorial logic circuit. The method also includes generating, using the at least one processing device, one or more polynomials representing operation of the combinatorial logic gate design. The method further includes mapping, using the at least one processing device, the one or more polynomials to one or more quantum polynomials, where each quantum polynomial has terms that are orthonormal. In addition, the method includes generating, using the at least one processing device, a quantum gate logic design based on the one or more quantum polynomials, where the quantum gate logic design is functionally equivalent to or better than the combinatorial logic gate design for the combinatorial logic circuit.

Abstract: In an exemplary embodiment, a computer-implemented method includes receiving an instruction to select an output set from an input set, where the output set is a top subset or a bottom subset of the input set, where the input set comprises a plurality of members, and where each member of the input set includes a plurality of bits. A first subset of the plurality of bits is selected. A histogram is generated, by a computer processor, based on the values in the first subset of the plurality of bits. A threshold value of the input set is determined, where the threshold value separates the values of the output set from the values of the remainder of the input set, and where the threshold value is based at least in part on the histogram. The output set is then extracted from the input set based on the threshold value.

Abstract: In an exemplary embodiment, a computer-implemented method includes receiving an instruction to select an output set from an input set, where the output set is a top subset or a bottom subset of the input set, where the input set comprises a plurality of members, and where each member of the input set includes a plurality of bits. A first subset of the plurality of bits is selected. A histogram is generated, by a computer processor, based on the values in the first subset of the plurality of bits. A threshold value of the input set is determined, where the threshold value separates the values of the output set from the values of the remainder of the input set, and where the threshold value is based at least in part on the histogram. The output set is then extracted from the input set based on the threshold value.