Patents by Inventor Michael T. Clarke
Michael T. Clarke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12153926Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.Type: GrantFiled: December 21, 2023Date of Patent: November 26, 2024Assignee: ADVANCED MICRO DEVICES, INC.Inventors: John Kalamatianos, Michael T. Clark, Marius Evers, William L. Walker, Paul Moyer, Jay Fleischman, Jagadish B. Kotra
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Publication number: 20240126552Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.Type: ApplicationFiled: December 21, 2023Publication date: April 18, 2024Inventors: JOHN KALAMATIANOS, MICHAEL T. CLARK, MARIUS EVERS, WILLIAM L. WALKER, PAUL MOYER, JAY FLEISCHMAN, JAGADISH B. KOTRA
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Patent number: 11868777Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.Type: GrantFiled: December 16, 2020Date of Patent: January 9, 2024Assignee: ADVANCED MICRO DEVICES, INC.Inventors: John Kalamatianos, Michael T. Clark, Marius Evers, William L. Walker, Paul Moyer, Jay Fleischman, Jagadish B. Kotra
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Publication number: 20230323519Abstract: A process for forming a durable, resistant oxide coating on zirconium metal or zirconium-based alloys, in which the metal or alloy is heated either rapidly to a predetermined temperature in an oxidizing or non-oxidizing environment or heated rapidly or slowly in an environment substantially devoid of an oxidizing agent until the predetermined temperature has been reached. The base metal can be pure zirconium or a zirconium-based alloy having niobium and/or titanium. The temperature, oxygen level, and time of exposure are controlled to elicit the desired properties. The oxidized specimen is then cooled under controlled conditions to further control the thickness and hardness of the oxide layer.Type: ApplicationFiled: April 7, 2023Publication date: October 12, 2023Inventor: Michael T. Clarke
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Publication number: 20220188117Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.Type: ApplicationFiled: December 16, 2020Publication date: June 16, 2022Inventors: JOHN KALAMATIANOS, MICHAEL T. CLARK, MARIUS EVERS, WILLIAM L. WALKER, PAUL MOYER, JAY FLEISCHMAN, JAGADISH B. KOTRA
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Patent number: 11347289Abstract: A method of operating a processing unit includes, in response to detecting that the processing unit is operating in a voltage limited state, calculating a set of headroom values by calculating a headroom value for each operational constraint in a set of operational constraints of the processing unit, based on the calculated set of headroom values, selecting from a set of performance features a subset of one or more performance features for enabling in the processing unit, and enabling the selected subset of performance features in the processing unit.Type: GrantFiled: September 23, 2020Date of Patent: May 31, 2022Assignee: Advanced Micro Devices, Inc.Inventors: Mahesh Subramony, David Suggs, Michael T Clark, Matthew M Crum
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Publication number: 20220091653Abstract: A method of operating a processing unit includes, in response to detecting that the processing unit is operating in a voltage limited state, calculating a set of headroom values by calculating a headroom value for each operational constraint in a set of operational constraints of the processing unit, based on the calculated set of headroom values, selecting from a set of performance features a subset of one or more performance features for enabling in the processing unit, and enabling the selected subset of performance features in the processing unit.Type: ApplicationFiled: September 23, 2020Publication date: March 24, 2022Inventors: Mahesh Subramony, David Suggs, Michael T. Clark, Matthew M. Crum
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Patent number: 11106596Abstract: Methods, devices, and systems for determining an address in a physical memory which corresponds to a virtual address using a skewed-associative translation lookaside buffer (TLB) are described. A virtual address and a configuration indication are received using receiver circuitry. A physical address corresponding to the virtual address is output if a TLB hit occurs. A first subset of a plurality of ways of the TLB is configured to hold a first page size. The first subset includes a number of the ways based on the configuration indication. A physical address corresponding to the virtual address is retrieved from a page table if a TLB miss occurs, and at least a portion of the physical address is installed in a least recently used way of a subset of a plurality of ways the TLB, determined according to a replacement policy based on the configuration indication.Type: GrantFiled: December 23, 2016Date of Patent: August 31, 2021Assignee: Advanced Micro Devices, Inc.Inventors: John M. King, Michael T. Clark
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Patent number: 11061753Abstract: Systems, apparatuses, and methods for implementing a hardware enforcement mechanism to enable platform-specific firmware visibility into an error state ahead of the operating system are disclosed. A system includes at least one or more processor cores, control logic, a plurality of registers, platform-specific firmware, and an operating system (OS). The control logic allows the platform-specific firmware to decide if and when the error state is visible to the OS. In some cases, the platform-specific firmware blocks the OS from accessing the error state. In other cases, the platform-specific firmware allows the OS to access the error state such as when the OS needs to unmap a page. The control logic enables the platform-specific firmware, rather than the OS, to make decisions about the replacement of faulty components in the system.Type: GrantFiled: March 29, 2018Date of Patent: July 13, 2021Assignee: Advanced Micro Devices, Inc.Inventors: Dean A. Liberty, Vilas K. Sridharan, Michael T. Clark, Jelena Ilic, David S. Christie, James R. Williamson, Cristian Constantinescu
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Publication number: 20190303230Abstract: Systems, apparatuses, and methods for implementing a hardware enforcement mechanism to enable platform-specific firmware visibility into an error state ahead of the operating system are disclosed. A system includes at least one or more processor cores, control logic, a plurality of registers, platform-specific firmware, and an operating system (OS). The control logic allows the platform-specific firmware to decide if and when the error state is visible to the OS. In some cases, the platform-specific firmware blocks the OS from accessing the error state. In other cases, the platform-specific firmware allows the OS to access the error state such as when the OS needs to unmap a page. The control logic enables the platform-specific firmware, rather than the OS, to make decisions about the replacement of faulty components in the system.Type: ApplicationFiled: March 29, 2018Publication date: October 3, 2019Inventors: Dean A. Liberty, Vilas K. Sridharan, Michael T. Clark, Jelena Ilic, David S. Christie, James R. Williamson, Cristian Constantinescu
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Patent number: 10223162Abstract: Systems, apparatuses, and methods for tracking system resource utilization of guest virtual machines (VMs). Counters may be maintained to track resource utilization of different system resources by different guest VMs executing on the system. When a guest VM initiates execution, stored values may be loaded into the resource utilization counters. While the guest VM executes, the counters may track the resource utilization of the guest VM. When the guest VM terminates execution, the counter values may be written to a virtual machine control block (VMCB) corresponding to the guest VM. Scaling factors may be applied to the counter values to normalize the values prior to writing the values to the VMCB. A cloud computing environment may utilize the tracking mechanisms to guarantee resource utilization levels in accordance with users' service level agreements.Type: GrantFiled: April 13, 2016Date of Patent: March 5, 2019Assignee: Advanced Micro Devices, Inc.Inventors: Michael T. Clark, Jay Fleischman, Thaddeus S. Fortenberry, Maurice B. Steinman
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Patent number: 10166559Abstract: A hose end sprayer has a sprayer lid and a container. The sprayer lid has a cap with a pair of bottle connectors formed of single-ended, fixed diameter, threaded sleeves of different radii mounted on the underside of the sprayer lid's cap. The connectors and a threaded adapter allow the sprayer lid to be connected with containers having mouths of different sizes, including containers in which liquid chemicals are sold. A liquid conduit extends across the cap between a hose inlet on one end and a spray nozzle on the other end, with a siphon tube intersecting the conduit within the periphery of the smaller of the bottle connectors, with mixture of pressurized carrier water entering the liquid conduit at the hose inlet with liquid chemical siphoned from the container through the siphon tube. The chemical/water admixture is expelled from the spray nozzle.Type: GrantFiled: September 2, 2014Date of Patent: January 1, 2019Assignee: Root-Lowell Manufacturing CompanyInventor: Michael T. Clarke
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Publication number: 20180181496Abstract: Methods, devices, and systems for determining an address in a physical memory which corresponds to a virtual address using a skewed-associative translation lookaside buffer (TLB) are described. A virtual address and a configuration indication are received using receiver circuitry. A physical address corresponding to the virtual address is output if a TLB hit occurs. A first subset of a plurality of ways of the TLB is configured to hold a first page size. The first subset includes a number of the ways based on the configuration indication. A physical address corresponding to the virtual address is retrieved from a page table if a TLB miss occurs, and at least a portion of the physical address is installed in a least recently used way of a subset of a plurality of ways the TLB, determined according to a replacement policy based on the configuration indication.Type: ApplicationFiled: December 23, 2016Publication date: June 28, 2018Applicant: Advanced Micro Devices, Inc.Inventors: John M. King, Michael T. Clark
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Publication number: 20170031719Abstract: Systems, apparatuses, and methods for tracking system resource utilization of guest virtual machines (VMs). Counters may be maintained to track resource utilization of different system resources by different guest VMs executing on the system. When a guest VM initiates execution, stored values may be loaded into the resource utilization counters. While the guest VM executes, the counters may track the resource utilization of the guest VM. When the guest VM terminates execution, the counter values may be written to a virtual machine control block (VMCB) corresponding to the guest VM. Scaling factors may be applied to the counter values to normalize the values prior to writing the values to the VMCB. A cloud computing environment may utilize the tracking mechanisms to guarantee resource utilization levels in accordance with users' service level agreements.Type: ApplicationFiled: April 13, 2016Publication date: February 2, 2017Inventors: Michael T. Clark, Jay Fleischman, Thaddeus S. Fortenberry, Maurice B. Steinman
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Publication number: 20140367489Abstract: A hose end sprayer has a sprayer lid and a container. The sprayer lid has a cap with a pair of bottle connectors formed of single-ended, fixed diameter, threaded sleeves of different radii mounted on the underside of the sprayer lid's cap. The connectors and a threaded adapter allow the sprayer lid to be connected with containers having mouths of different sizes, including containers in which liquid chemicals are sold. A liquid conduit extends across the cap between a hose inlet on one end and a spray nozzle on the other end, with a siphon tube intersecting the conduit within the periphery of the smaller of the bottle connectors, with mixture of pressurized carrier water entering the liquid conduit at the hose inlet with liquid chemical siphoned from the container through the siphon tube. The chemical/water admixture is expelled from the spray nozzle.Type: ApplicationFiled: September 2, 2014Publication date: December 18, 2014Applicant: ROOT-LOWELL MANUFACTURING COMPANYInventor: Michael T. Clarke
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Patent number: 8820661Abstract: A hose end sprayer has a sprayer lid and a container. The sprayer lid has a cap with a pair of bottle connectors formed of single-ended, fixed diameter, threaded sleeves of different radii mounted on the underside of the sprayer lid's cap. The connectors and a threaded adapter allow the sprayer lid to be connected with containers having mouths of different sizes, including containers in which liquid chemicals are sold. A liquid conduit extends across the cap between a hose inlet on one end and a spray nozzle on the other end, with a siphon tube intersecting the conduit within the periphery of the smaller of the bottle connectors, with mixture of pressurized carrier water entering the liquid conduit at the hose inlet with liquid chemical siphoned from the container through the siphon tube. The chemical/water admixture is expelled from the spray nozzle.Type: GrantFiled: January 31, 2011Date of Patent: September 2, 2014Assignee: Root-Lowell Manufacturing CompanyInventor: Michael T. Clarke
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Publication number: 20110121102Abstract: A hose end sprayer has a sprayer lid and a container. The sprayer lid has a cap with a pair of bottle connectors formed of single-ended, fixed diameter, threaded sleeves of different radii mounted on the underside of the sprayer lid's cap. The connectors and a threaded adapter allow the sprayer lid to be connected with containers having mouths of different sizes, including containers in which liquid chemicals are sold. A liquid conduit extends across the cap between a hose inlet on one end and a spray nozzle on the other end, with a siphon tube intersecting the conduit within the periphery of the smaller of the bottle connectors, with mixture of pressurized carrier water entering the liquid conduit at the hose inlet with liquid chemical siphoned from the container through the siphon tube. The chemical/water admixture is expelled from the spray nozzle.Type: ApplicationFiled: January 31, 2011Publication date: May 26, 2011Applicant: ROOT-LOWELL MANUFACTURING COMPANYInventor: Michael T. Clarke
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Patent number: 7937574Abstract: In an embodiment, a microcode unit for a processor is contemplated. The microcode unit comprises a microcode memory storing a plurality of microcode routines executable by the processor, wherein each microcode routine comprises two or more microcode operations. Coupled to the microcode memory, the sequence control unit is configured to control reading microcode operations from the microcode memory to be issued for execution by the processor. The sequence control unit is configured to stall issuance of microcode operations forming a body of a loop in a first routine of the plurality of microcode routines until a loop counter value that indicates a number of iterations of the loop is received by the sequence control unit.Type: GrantFiled: July 17, 2007Date of Patent: May 3, 2011Assignee: Advanced Micro Devices, Inc.Inventors: Michael T. Clark, Jelena Ilic, Syed Faisal Ahmed, Michael T. DiBrino
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Patent number: 7891900Abstract: An applicator system comprises a reservoir, a conduit extending from a first end at the reservoir to an opposite terminal end, an applicator connected with the conduit, a flow control engaging the conduit, and a holder releasably coupling with the applicator. The applicator has a liquid impermeable back, an opposite porous face, and a plenum. The plenum, situated between the back and face, releasably couples with the conduit terminal end and distributes fluid to the face. The face and plenum may be replaceable and disposable. The holder is a rigid member that releasably couples with the applicator, provides a structural foundation to the applicator, and includes a handle for manipulation by a user. An extension can be employed to connect the flow control to the handle, effectively extending the length of the handle. A helical coil portion of the conduit can be conveniently wrapped around the extension to prevent kinking.Type: GrantFiled: May 7, 2007Date of Patent: February 22, 2011Inventor: Michael T. Clarke
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Patent number: 7831816Abstract: A processor receives a command via a sideband interface on the processor to read processor state information, e.g., CPUID information. The sideband interface provides the command information to a microcode engine in the processor that executes the command to retrieve the designated processor state information at an appropriate instruction boundary and retrieves the processor state information. That processor information is stored in local buffers in the sideband interface to avoid modifying processor state. After the microcode engine completes retrieval of the information and the sideband interface command is complete, execution returns to the normal flow in the processor. Thus, the processor state information may be obtained non-destructively during processor runtime.Type: GrantFiled: May 30, 2008Date of Patent: November 9, 2010Assignee: GLOBALFOUNDRIES Inc.Inventors: Wallace P. Montgomery, David F. Tobias, Michael T. Clark