Patents by Inventor Michael T. Derwin

Michael T. Derwin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Personal computer having memory system with write-through cache and pipelined snoop cycles
    Patent number: 5341487
    Abstract: A personal computer has a memory system including a write-through cache which is accessible by more than one device. A snoop mechanism includes logic that monitors bus master control signals to determine if a new memory write cycle has been started before a current snoop cycle has finished. If a new cycle has been started, then a corresponding snoop cycle occurs which overlaps the new memory cycle and is pipelined with the previous snoop cycle so that the snooping mechanism does not fall behind the memory write cycles.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: August 23, 1994
    Assignee: International Business Machines Corp.
    Inventors: Michael T. Derwin, William A. Wall
  • Data processing apparatus having address decoder supporting wide range of operational frequencies
    Patent number: 5305277
    Abstract: An address decoder is connected to an address bus and comprises a plurality of latches for latching address signals from the address bus. Decode logic is connected to use unlatched addresses from the address bus or latched addresses from the latches. The decoder is selectively operable to decode addresses in two modes, an unlatched mode and a latched mode dependent upon system frequency. The decode logic produces a signal that is transmitted into a state machine for controlling operation thereof.
    Type: Grant
    Filed: April 24, 1991
    Date of Patent: April 19, 1994
    Assignee: International Business Machines Corporation
    Inventors: Michael T. Derwin, Brenda M. Ozaki, William A. Wall