Abstract: A percussion instrument data generating system can include a plurality of capacitance sensors coupled to the at least a first surface. A controller section can includes a plurality of switches for selectively connecting each capacitance sensor to a sense node. A capacitance sense circuit can be coupled to the common sense node and can measures a capacitance presented at the common sense node. An encoder section that generates a position value for a sensed input event based that varies according to which capacitance sensor detects the input event.

Abstract: The instant invention is directed to a wallboard panel which is made from new or recycled paper. The panel comprises a pair of sheet members which are parallel in alignment and a honeycomb core sandwiched between the sheet members. The inner surfaces of the sheet members are coated with an adhesive material and the honeycomb core is impressed into the adhesive layers. The honeycomb core is manufactured by a novel process. The sheet members and honeycomb core can be coated with a phenolic resin and/or a fire retardant material. The wallboard panel can also include insulation and/or fire-retardant material disposed within the hollow honeycomb core.

Abstract: According to one embodiment, an integrated circuit (100) includes a programmable portion (102) and a communication portion (104). A programmable portion (102) may include logic circuits that are configurable by a user. A communication portion (104) may include one or more circuit blocks designed to perform predetermined serial data communication functions. According to one embodiment, a communication portion (104) may include a block converter (218) that can encode/decode input data words into output data words, and a scrambler circuit (220) for scrambling/de-scrambling data according to a predetermined scrambling polynomial value. Different scrambling polynomial values may be selected from an operation control store (206) to provide a variety of different scrambling/de-scrambling functions.

Abstract: An apparatus generally comprising a circuit and an interface device is disclosed. The circuit may be configured to (i) generate a plurality of test signals to simultaneously stimulate a device and a model of the device during a test and (ii) receive a plurality of model signals generated by the model in response to the test signals. The interface device may be configured to receive a plurality of device signals generated by the device in response the test signals.

Abstract: An apparatus comprising a wireless transceiver and a programmable logic circuit. The wireless transceiver may be coupled to the programmable logic circuit. The programmable logic circuit may comprise a programmable logic device, a processor, and a memory circuit, implemented in a single integrated circuit package.

Abstract: An apparatus comprising one or more look-up-tables (LUTs). The LUTs may be configured to provide logical functions. The one or more LUTs are generally implemented within a multiport memory.

Abstract: An apparatus comprising one or more logic circuits. The logic circuits may be configured to provide computation. The one or more logic circuits generally comprise dedicated logic within a programmable logic device (PLD).

Abstract: According to one embodiment, a programmable logic assembly (200) may include a nonvolatile memory (202) may be coupled to an associated volatile programmable logic device (PLD) (204). Built-in-self-test (BIST) data (208) may be stored in a nonvolatile memory (202) that places the volatile PLD (204) in a self-test configuration. If a volatile PLD (204) passes a self-test, user data (210) may be stored in a nonvolatile memory (202) that places a volatile PLD (204) into a user determined configuration.

Abstract: An apparatus including a clock generating circuit and a programmable logic circuit. The clock generating circuit may be configured to generate one or more output signals in response to a reference signal and one or more control signals, wherein the output signals each have a frequency and a phase that are dynamically variable. The programmable logic circuit may be configured to generate one or more of the control signals and receive the one or more output signals.

Abstract: According to one embodiment, a programmable logic assembly (200) may include a nonvolatile memory devices (202-0 and 202-1) coupled to an associated volatile programmable logic device (PLD) (204). Each nonvolatile memory device (202-0 and 202-1) may store different configuration data for a volatile PLD (204). Upon a predetermined event, such as powerup or reset, one of the nonvolatile memory devices (202-0 and 202-1) may be selected and its configuration data read into a volatile PLD (204).

Abstract: An I/O cell of a programmable logic device comprising a register, a first multiplexer, a second multiplexer, and a third multiplexer. The first multiplexer may be configured to present one of a plurality of signals to a data input of the register in response to a control signal. The second multiplexer may be configured to select either an output signal from the register or an external input signal in response to the control signal. The third multiplexer may be configured to select one of a number of inputs for presentation as an output signal of the I/O cell in response to the control signal. The register may be configured as an internal register of the programmable logic device when the I/O cell is configured to receive a combinatorial input signal and/or present a combinatorial output signal.

Abstract: A hill maker hoe embodying a set of semicircular rearwardly opposing concavo-convex blades assembled to an angularly and extensibly adjustable handle which enables a user to accommodate the hoe for individual height and weight profile as well as for ease of manual use and efficiency in employing the same to form and make a planting hill from a single location with but a simple push-pull motion thereof.

Abstract: An ink jet printing ink is first formulated in concentrated form, and in this form it is subjected to stressful operating conditions such as an elevated temperature. This stress causes particle formation. After filtration to remove these particles, the final ink formulation is prepared, including for the first time ingredients which inhibit particle formation.

Abstract: An aqueous blue ink for use in ink jet printing, the ink being a mixture of a blue dye, a cyan dye, a styrene/acrylic binder, water and ammonia as a volatile solubilizing constituent.

Abstract: A layered electrophotographic plate having a triaryl pyrazoline containing charge transport layer and a charge generation layer having a photogenerating dye of the composition: ##STR1##

Abstract: A process for electrophotographic reproduction, and a layered electrophotographic plate having a conventional charge generation layer and a p-type hydrazone containing charge transport layer, in which the surface of the charge transport layer is selectively discharged by actinic radiation as a result of the migration through the transport layer of charges generated in the charge generation layer as a result of the actinic radiation and injected into the transport layer, the hydrazone having the composition; ##STR1##