Patents by Inventor Michael TABIERA

Michael TABIERA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11688715
    Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: June 27, 2023
    Assignee: STMicroelectronics, Inc.
    Inventors: Rennier Rodriguez, Rammil Seguido, Raymond Albert Narvadez, Michael Tabiera
  • Publication number: 20220005782
    Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 6, 2022
    Applicant: STMicroelectronics, Inc.
    Inventors: Rennier RODRIGUEZ, Rammil SEGUIDO, Raymond Albert NARVADEZ, Michael TABIERA
  • Patent number: 11152326
    Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: October 19, 2021
    Assignee: STMicroelectronics, Inc.
    Inventors: Rennier Rodriguez, Rammil Seguido, Raymond Albert Narvadez, Michael Tabiera
  • Patent number: 11088087
    Abstract: The present disclosure is directed to a micro module with a support structure. The micro module includes a carrier substrate having contacts and a bonding pad, a semiconductor die, and a support structure. The semiconductor die is positioned on the bonding pad and is electrically coupled to the contacts. The support structure is positioned on the bonding pad and adjacent to the semiconductor die. The support structure reinforces the bonding pad such that the bonding pad is more rigid than flexible. As a result, an external force applied to the micro module is less likely to cause the micro module to bend and damage the semiconductor die.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: August 10, 2021
    Assignee: STMicroelectronics, Inc.
    Inventors: Freddie Folio, Michael Tabiera, Edwin Graycochea, Jr.
  • Publication number: 20200135686
    Abstract: The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.
    Type: Application
    Filed: October 25, 2019
    Publication date: April 30, 2020
    Inventors: Rennier RODRIGUEZ, Rammil SEGUIDO, Raymond Albert NARVADEZ, Michael TABIERA
  • Publication number: 20200035619
    Abstract: The present disclosure is directed to a micro module with a support structure. The micro module includes a carrier substrate having contacts and a bonding pad, a semiconductor die, and a support structure. The semiconductor die is positioned on the bonding pad and is electrically coupled to the contacts. The support structure is positioned on the bonding pad and adjacent to the semiconductor die. The support structure reinforces the bonding pad such that the bonding pad is more rigid than flexible. As a result, an external force applied to the micro module is less likely to cause the micro module to bend and damage the semiconductor die.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 30, 2020
    Inventors: Freddie FOLIO, Michael TABIERA, Edwin GRAYCOCHEA, JR.
  • Patent number: 9824979
    Abstract: An electronic package includes a substrate having opposing first and second surfaces. Conductive areas are on a first surface of the substrate and include at least one edge conductive area. A plurality of conductive bumps are on the second surface of the substrate and coupled to respective ones of the conductive areas. An integrated circuit (IC) is carried by the substrate. Bond wires are coupled between the IC and respective ones of the conductive areas. An encapsulating material is over the IC and adjacent portions of the substrate. A conductive layer is on the encapsulating material, and at least one conductive body is coupled between the at least one edge conductive area and the conductive layer.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: November 21, 2017
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Godfrey Dimayuga, Frederick Arellano, Michael Tabiera
  • Publication number: 20170186698
    Abstract: An electronic package includes a substrate having opposing first and second surfaces. Conductive areas are on a first surface of the substrate and include at least one edge conductive area. A plurality of conductive bumps are on the second surface of the substrate and coupled to respective ones of the conductive areas. An integrated circuit (IC) is carried by the substrate. Bond wires are coupled between the IC and respective ones of the conductive areas. An encapsulating material is over the IC and adjacent portions of the substrate. A conductive layer is on the encapsulating material, and at least one conductive body is coupled between the at least one edge conductive area and the conductive layer.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Godfrey DIMAYUGA, Frederick ARELLANO, Michael TABIERA