Abstract: A filter element has a filter media and at least one base member. The filter element further has a ceramic paste connecting the filter media to the at least one base member.

Abstract: In a computer-implemented system for managing a database system with structured data records, two internal databases separate from one another are maintained, an interface for an input at least of parts of a structured data record into one of the databases is provided, at least one interface for communicating with an external database system is provided, in order to communicate between one of the internal databases and the external database.

Abstract: Systems and processes are described for sanitizing a food product with ozone gas. The ozone gas is generated using a low pressure, low volume ozone gas generator and is delivered to a fluid injector. The fluid injector receives high pressure carrier fluid from a carrier fluid source and causes the ozone to be entrained in a stream of carrier fluid. The entrainment is created by passing the carrier fluid through a venturi diffuser inside the injector which creates a negative pressure in the sanitizing fluid line, thus drawing the sanitizing fluid into the carrier fluid and creating a highly homogenized fluid jet. The fluid jet is then injected into a container which contains a food product to be sanitized by the ozone. The container may also be provided with a mixing paddle to vigorously mix the food product while the ozone/carrier fluid jet is injected into the food product, which further ensures that the food product is contacted with sanitizing ozone gas.

Abstract: The present invention is particularly directed to the enabling of a refresh cycle for a dynamic memory chip at a period in the fetch cycle, for example, of a type 8085 microprocessor, when the normal timing of the chip does not permit addressing of the memory. Specifically, in the fetch cycle, a fourth clock period occurs following a memory read pulse. This fourth clock cycle is required for the application of the microprocessor, but does not involve any addressing of the memory. Accordingly, in accordance with the invention, upon the occurrence of a memory read cycle, during which a normal refresh occurs, the refreshing circuitry is reactivated, so that a further refresh cycle will occur during this fourth clock.

Abstract: In a character recognition system lines of data are stored in a line memory. This data is then accessed by a hardware implemented character position detector over a special line memory bus, i.e., a LM-bus. The detector searches the memory for the margins of characters and can also perform a count of the black points or character points within the margins. The position detector is activated by a system controller over a B-bus, but once started by the controller it will run on autonomously until it has completed its task, thereby leaving the processor and the B-bus available for other functions.

Abstract: In a character recognition system lines of data are stored in a line memory via a series of multiplexers. The data can originate in a controller for the system, a character reading station or other sub-systems, and is supplied to the line memory over a controller bus, a transport bus and a line memory bus, respectively. Although stored in line form, two-dimensional sub-arrays of the data in various configurations can be accessed directly by the other sub-systems of the recognition system via the multiplexers and the line memory bus, without the interaction of the controller bus.