Patents by Inventor Michael Thomas Fluet

Michael Thomas Fluet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9759772
    Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to the test instrument, and that is programmed to control operation of the test instrument, a second processing system that is dedicated to device testing, the second processing system being programmable to run one or more test programs to test the device, and programmable logic configured to act as an interface between the test instrument and the device, the programmable logic being configurable to perform one or more tests on the device. The first processing system and the second processing system are programmable to access the device via the programmable logic.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: September 12, 2017
    Assignee: Teradyne, Inc.
    Inventors: David Kaushansky, Lloyd K. Frick, Stephen J. Bourassa, David Vandervalk, Michael Thomas Fluet, Michael Francis McGoldrick
  • Patent number: 9672127
    Abstract: An example test system includes a bus interface to connect to a bus of a computer system; and test instruments to perform one or more test operations on a UUT, where the test instruments connect to the bus interface to enable communication between the computer system and the test instruments via the bus interface. At least one test instrument includes: ports to which the UUT is connectable, with each of the ports interfacing to a corresponding peripheral bus supported by the at least one test instrument; circuits to connect the bus interface to the peripheral buses, with each circuit being configured to convert between a bus interface protocol run on the bus interface and a peripheral bus protocol run on a peripheral bus; and a switch to identify a target circuit of the circuits, with the switch to direct communications between the computer system and the target circuit.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: June 6, 2017
    Assignee: Teradyne, Inc.
    Inventors: Michael Thomas Fluet, Peter Hansen, Pavel Gilenberg
  • Publication number: 20160306724
    Abstract: An example test system includes a bus interface to connect to a bus of a computer system; and test instruments to perform one or more test operations on a UUT, where the test instruments connect to the bus interface to enable communication between the computer system and the test instruments via the bus interface. At least one test instrument includes: ports to which the UUT is connectable, with each of the ports interfacing to a corresponding peripheral bus supported by the at least one test instrument; circuits to connect the bus interface to the peripheral buses, with each circuit being configured to convert between a bus interface protocol run on the bus interface and a peripheral bus protocol run on a peripheral bus; and a switch to identify a target circuit of the circuits, with the switch to direct communications between the computer system and the target circuit.
    Type: Application
    Filed: April 16, 2015
    Publication date: October 20, 2016
    Inventors: Michael Thomas Fluet, Peter Hansen, Pavel Gilenberg
  • Patent number: 9470759
    Abstract: In general, a test instrument includes a processing system programmed to control operation of the test instrument, including communication with a control system, and programmed to run one or more test programs to test a device interfaced to the test instrument, the processing system including multiple processing devices, and a configurable interface, through which communications are exchanged with the device interfaced to the test instrument, the configurable interface including physical ports, to which different configurations are assignable.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: October 18, 2016
    Assignee: Teradyne, Inc.
    Inventors: Stephen J. Bourassa, Michael Francis McGoldrick, David Kaushansky, Michael Thomas Fluet
  • Publication number: 20130110446
    Abstract: In general, a test instrument includes a processing system programmed to control operation of the test instrument, including communication with a control system, and programmed to run one or more test programs to test a device interfaced to the test instrument, the processing system including multiple processing devices, and a configurable interface, through which communications are exchanged with the device interfaced to the test instrument, the configurable interface including physical ports, to which different configurations are assignable.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: TERADYNE, INC.
    Inventors: Stephen J. Bourassa, Michael Francis McGoldrick, David Kaushansky, Michael Thomas Fluet
  • Publication number: 20130110445
    Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to the test instrument, and that is programmed to control operation of the test instrument, a second processing system that is dedicated to device testing, the second processing system being programmable to run one or more test programs to test the device, and programmable logic configured to act as an interface between the test instrument and the device, the programmable logic being configurable to perform one or more tests on the device. The first processing system and the second processing system are programmable to access the device via the programmable logic.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: TERADYNE, INC.
    Inventors: David Kaushansky, Lloyd K. Frick, Stephen J. Bourassa, David Vandervalk, Michael Thomas Fluet, Michael Francis McGoldrick