Patents by Inventor Michael Toksvig
Michael Toksvig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9928639Abstract: A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.Type: GrantFiled: November 27, 2013Date of Patent: March 27, 2018Assignee: NVIDIA CORPORATIONInventors: Michael Toksvig, Erik Lindholm
-
Patent number: 9510191Abstract: Various embodiments are disclosed for enabling a user to physically acknowledge monitoring of their mobile device's network address (e.g., upon entering a store to track the user's movement through the store based upon the mobile device's MAC address). An Access Point coupled with a network system may identify the user device's MAC address, but the network system may defer retention and use of the MAC address until the user provides a physical authorization to do so. The user may provide such a physical authorization by placing their mobile device in physical proximity to a kiosk. The kiosk may emit a signal via, e.g., a magnetic field, radiation, sonification, imaging, etc. An application running on the user device may receive this signal. For example, the kiosk may emit a magnetic field to manipulate the user device's compass hardware. The application may monitor and derive a kiosk identifier from these manipulations.Type: GrantFiled: June 20, 2014Date of Patent: November 29, 2016Assignee: FACEBOOK, INC.Inventors: Michael Toksvig, Yael Maguire
-
Publication number: 20150373537Abstract: Various embodiments are disclosed for enabling a user to physically acknowledge monitoring of their mobile device's network address (e.g., upon entering a store to track the user's movement through the store based upon the mobile device's MAC address). An Access Point coupled with a network system may identify the user device's MAC address, but the network system may defer retention and use of the MAC address until the user provides a physical authorization to do so. The user may provide such a physical authorization by placing their mobile device in physical proximity to a kiosk. The kiosk may emit a signal via, e.g., a magnetic field, radiation, sonification, imaging, etc. An application running on the user device may receive this signal. For example, the kiosk may emit a magnetic field to manipulate the user device's compass hardware. The application may monitor and derive a kiosk identifier from these manipulations.Type: ApplicationFiled: June 20, 2014Publication date: December 24, 2015Inventors: Michael Toksvig, Yael Maguire
-
Patent number: 8698823Abstract: A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.Type: GrantFiled: April 8, 2009Date of Patent: April 15, 2014Assignee: NVIDIA CorporationInventors: Michael Toksvig, Erik Lindholm
-
Publication number: 20140092114Abstract: A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.Type: ApplicationFiled: November 27, 2013Publication date: April 3, 2014Applicant: NVIDIA CORPORATIONInventors: Michael Toksvig, Erik Lindholm
-
Publication number: 20100259536Abstract: A system and method for facilitating increased graphics processing without deadlock. Embodiments of the present invention provide storage for execution unit pipeline results (e.g., texture pipeline results). The storage allows increased processing of multiple threads as a texture unit may be used to store information while corresponding locations of the register file are available for reallocation to other threads. Embodiments further provide for preventing deadlock by limiting the number of requests and ensuring that a set of requests is not issued unless there are resources available to complete each request of the set of requests. Embodiments of the present invention thus provide for deadlock free increased performance.Type: ApplicationFiled: April 8, 2009Publication date: October 14, 2010Applicant: NVIDIA CORPORATIONInventors: Michael Toksvig, Erik Lindholm
-
Publication number: 20080094405Abstract: A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks.Type: ApplicationFiled: December 14, 2007Publication date: April 24, 2008Inventors: Rui BASTOS, Karim Abdalla, Christian Rouet, Michael Toksvig, Johnny Rhoades, Roger Allen, John Tynefield, Emmett Kilgariff, Gary Tarolli, Brian Cabral, Craig Wittenbrink, Sean Treichler
-
Patent number: 7301542Abstract: A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.Type: GrantFiled: September 29, 2004Date of Patent: November 27, 2007Assignee: NVIDIA CorporationInventors: Michael Toksvig, Walter Donovan, Jonah M. Alben, Krishnaraj S. Rao, Stephen D. Lew
-
Publication number: 20070008336Abstract: A pixel center position that is not covered by a primitive covering a portion of the pixel is displaced to lie within a fragment formed by the intersection of the primitive and the pixel. X,y coordinates of a pixel center are adjusted to displace the pixel center position to lie within the fragment, affecting actual texture map coordinates or barycentric weights. Alternatively, a centroid sub-pixel sample position is determined based on coverage data for the pixel and a multisample mode. The centroid sub-pixel sample position is used to compute pixel or sub-pixel parameters for the fragment.Type: ApplicationFiled: September 14, 2006Publication date: January 11, 2007Inventors: Rui Bastos, Michael Toksvig, Karim Abdalla
-
Publication number: 20060077209Abstract: A pixel center position that is not covered by a primitive covering a portion of the pixel is displaced to lie within a fragment formed by the intersection of the primitive and the pixel. X,y coordinates of a pixel center are adjusted to displace the pixel center position to lie within the fragment, affecting actual texture map coordinates or barycentric weights. Alternatively, a centroid sub-pixel sample position is determined based on coverage data for the pixel and a multisample mode. The centroid sub-pixel sample position is used to compute pixel or sub-pixel parameters for the fragment.Type: ApplicationFiled: October 7, 2004Publication date: April 13, 2006Inventors: Rui Bastos, Michael Toksvig, Karim Abdalla
-
Publication number: 20050225554Abstract: A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks.Type: ApplicationFiled: September 10, 2004Publication date: October 13, 2005Inventors: Rui Bastos, Karim Abdalla, Christian Rouet, Michael Toksvig, Johnny Rhoades, Roger Allen, John Tynefield, Emmett Kilgariff, Gary Tarolli, Brian Cabral, Craig Wittenbrink, Sean Treichler
-
Patent number: 6870542Abstract: A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.Type: GrantFiled: June 28, 2002Date of Patent: March 22, 2005Assignee: NVIDIA CorporationInventors: Michael Toksvig, Walter Donovan, Jonah M. Alben, Krishnaraj S. Rao, Stephen D. Lew
-
Publication number: 20040001067Abstract: A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.Type: ApplicationFiled: June 28, 2002Publication date: January 1, 2004Applicant: NVIDIA CorporationInventors: Michael Toksvig, Walter Donovan, Jonah M. Alben, Krishnaraj S. Rao, Stephen D. Lew