Patents by Inventor Michael Uhler

Michael Uhler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160299856
    Abstract: System and method for improved transferring of data involving memory device systems.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 13, 2016
    Inventors: Vlad FRUCHTER, Keith LOWERY, Michael UHLER, Steven WOO, Chi-Ming (Philip) YEUNG, Ronald LEE
  • Publication number: 20060078996
    Abstract: The present invention relates to a method of transfecting cells comprising applying cells directly onto nucleic acids which are immobilized in transfection complexes on a surface and which transfect the cells. Preferably, the nucleic acids are immobilized in an array. In another aspect of the present invention, the method further includes expression of the nucleic acids in the transfected cells. In yet another aspect of the present invention, the method further comprises detecting the expression of the nucleic acids in the transfected cells.
    Type: Application
    Filed: March 18, 2005
    Publication date: April 13, 2006
    Inventor: Michael Uhler
  • Patent number: 5630166
    Abstract: A plurality of processors each includes a central processor unit for processing programs at predetermined synchronization priority levels and a cache memory. A memory shared by all of the processors includes an synchronization level table which identifies a processor operating at each synchronization priority level. A common bus interconnects the processors and the memory. When a processor is to execute a program, it adjusts its synchronization priority level to a predetermined synchronization priority level by accessing the synchronization level table over the common bus to determine whether the level is accessible and, if so, places an entry in the table to indicate that the synchronization priority level is occupied. If the synchronization priority level is not accessible, the processor continually monitors the entry in the table over the common bus to determine when it is accessible by monitoring its cache, which contains a copy of the table entry associated with the synchronization priority level.
    Type: Grant
    Filed: August 27, 1996
    Date of Patent: May 13, 1997
    Assignee: Digital Equipment Corporation
    Inventors: Rodney Gamache, Stuart Farnham, Michael Harvey, William A. Laing, Kathleen Morse, Michael Uhler