Patents by Inventor Michael Varnau

Michael Varnau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070045840
    Abstract: A circuit component and method by which degradation of a solder connection by electromigration can be prevented or reduced. The component generally includes an interconnect pad on a surface of the component, a metallic multilayer structure overlying the interconnect pad and having a solderable surface layer, and a solder material on the multilayer structure. According to a preferred aspect of the component and method, a stud is wire-bonded to the solderable surface layer of the multilayer structure and encased by the solder material to provide a low electrical resistance path through the solder material.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventor: Michael Varnau
  • Publication number: 20060273467
    Abstract: A flip chip package and method for conducting heat from one or more flip chips within the package. The package includes a substrate having a first surface to which the flip chips are attached with solder connections, a second surface with solder balls electrically connected to the solder connections on the first surface, and a heat-spreading member bonded to the flip chips and to the first surface of the substrate with bond materials. The method includes reflow soldering the flip chips to the first surface of the substrate, attaching the solder balls to the second surface of the substrate, applying a bond material to the flip chips and a second bond material to the substrate, placing the heat-spreading member on the bond materials, and then applying heat to bond the heat-spreading member to the flip chips and substrate with the bond materials.
    Type: Application
    Filed: June 6, 2005
    Publication date: December 7, 2006
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: Scott Brandenburg, Michael Varnau, Matthew Walsh
  • Publication number: 20050081375
    Abstract: A method of fabricating a printed circuit board assembly includes molding an array having a plurality of integrated circuits that are physically interconnected. Each integrated circuit has a molded body defining a lower surface. The integrated circuits have a plurality of electrical contacts on the bottom surface. The method includes singulating the array to form a plurality of separate integrated circuits, and at least a portion of the electrical contacts are cut. An organic solderability preservative is applied to the cut portion of the electrical contacts. Heat is applied to the integrated circuits to dry the circuits, and the integrated circuits are soldered to a printed circuit board by applying molten solder to remove the organic solderability preservative.
    Type: Application
    Filed: October 17, 2003
    Publication date: April 21, 2005
    Inventors: Frederick Kuhlman, Michael Varnau, Rita Kuhlman, Charles Delheimer