Patents by Inventor Michael Verne Fenske

Michael Verne Fenske has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6570228
    Abstract: A method and an apparatus for measuring insulating film thickness, such as the width of sidewall spacers. The method includes positioning a first test structure having a first resistance at a first location on a semiconductor wafer and positioning a second test structure having a second resistance different from the first resistance at a second location on the semiconductor wafer. The method also includes measuring the first resistance of the first test structure and measuring the second resistance of the second test structure. The method also includes determining an average characteristic of the first test structure and the second test structure, other than resistance, based on the first resistance of the first test structure and the second resistance of the second test structure.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: May 27, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark Brandon Fuselier, Roger Thomas Williams, Michael Verne Fenske
  • Patent number: 6287877
    Abstract: A method for electrically quantifying a semiconductor device's spacers' width. In one embodiment, a method comprises the step of measuring a resistance across a region of interest of each of a plurality of semiconductor structures including the semiconductor device in question, where the region of interest may be a source or drain region of the semiconductor structure or may be one of a plurality of lightly doped drain regions of the semiconductor structure. The method further comprises determining a width of one of a plurality of lightly doped drain regions of the semiconductor device from the resistance across the region of interest of each of the plurality of semiconductor structures. The method further comprises determining the semiconductor device's spacers' width from the width of one of the plurality of lightly doped drain regions of the semiconductor device.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: September 11, 2001
    Assignee: Advanced Micro Devices
    Inventors: Roger Williams, Mark Brandon Fuselier, Michael Verne Fenske