Patents by Inventor Michael W. Arms

Michael W. Arms has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230245709
    Abstract: A method may include, during a PEI phase BIOS, responsive to a flag being set in a previous boot session of an information handling system to test a first designated region of a memory of the information handling system: testing the first designated region for a memory fault; in response to detecting the memory fault, mapping out the first designated region and designating an additional region of the memory as a designated region for SMRAM and repeating testing of additional designated regions, mapping out of failed additional designated regions, and designating new additional regions of the memory until a designated region passes testing without memory fault; and in response to detecting passage of testing without memory fault of a designated region comprising either of the first designated region or an additional region of the memory, configuring the designated region for use as the SMRAM for the information handling system.
    Type: Application
    Filed: February 1, 2022
    Publication date: August 3, 2023
    Applicant: Dell Products L.P.
    Inventors: Balasingh P. SAMUEL, Michael W. ARMS, Vivek Viswanathan IYER
  • Publication number: 20230244564
    Abstract: An information handling system may include a processor, a memory communicatively coupled to the processor, and a basic input/output system (BIOS) communicatively coupled to the processor and comprising a program of executable instructions configured to, when read and executed by the processor: monitor diagnostics information associated with one or more information handling resources of the information handling system, from the diagnostics information, determine whether a trigger point associated with a prescription for initiating a firmware update has been reached, and responsive to the trigger point being reached, perform a remedial action as defined by the prescription.
    Type: Application
    Filed: February 1, 2022
    Publication date: August 3, 2023
    Applicant: Dell Products L.P.
    Inventors: Jacob MINK, Balasingh Ponraj SAMUEL, Michael W. ARMS
  • Publication number: 20230064398
    Abstract: A system and method for resolving (BIOS) firmware issues affecting one or more information handling systems, includes: responsive to receiving information indicative of the BIOS firmware issue, developing one or more executable scripts for resolving the BIOS firmware issue without modifying the BIOS firmware. The executable scripts include a first script for collecting data pertaining to the BIOS firmware issue, which is pushed to at least one affected information handling system. The first script includes processor-executable instructions that the affected information handling system executes in a pre-boot state to perform operations including establishing a secure and privileged pre-boot session, collecting data associated with the BIOS firmware issue from within the secure and privileged pre-boot session, and sending the data associated with the BIOS issue to a support resource.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Dell Products L.P.
    Inventors: Balasingh P. SAMUEL, Jacob MINK, Michael W. ARMS, Richard M. TONRY
  • Patent number: 11579893
    Abstract: Systems and methods are provided for supporting use of system BIOS components (e.g., such as BIOS debug messages, debugger firmware, UEFI drivers, etc.) that are stored separately from the remainder of system BIOS firmware for an information handling system. The system BIOS components may represent only a portion of the total BIOS firmware, and may be selectively retrieved and loaded from the separate storage into system memory when needed by the system BIOS for operating purposes (e.g., such as debugging operations).
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: February 14, 2023
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms, Richard M. Tonry, Anand Prakash Joshi
  • Patent number: 11347664
    Abstract: A method may be provided in a basic input/output system embodied in persistent memory including two data areas for storing data associated with the basic input/output system and a code area comprising firmware for performing functionality of the basic input/output system. The method may include, at any given time, designating one of the data areas as a non-transitory data area and designating the other of the data areas as a transitory data area; and for each item of data associated with the basic input/output system, determining if such item of data is non-transitory-type data or transitory-type data, storing such item of data in the non-transitory data area if such item of data is determined to be non-transitory-type data, and storing such item of data in the transitory data area if such item of data is determined to be transitory-type data.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: May 31, 2022
    Assignee: Dell Products L.P.
    Inventors: Balasingh P. Samuel, Michael W. Arms
  • Patent number: 11314578
    Abstract: Embodiments of information handling systems (HSs) and computer-implemented methods are provided herein to detect and recover from spurious PCIe device resets. One embodiment of a disclosed method is performed by a host processor of an IHS that includes a plurality of Peripheral Component Interconnect Express (PCIe) devices, each including a set of PCIe configuration registers containing configuration settings for the PCIe device. The disclosed method includes generating, in response to the IHS transitioning from a lower power state to a higher power state, a PCIe device table containing the configuration settings stored within the set of PCIe configuration registers for each of the PCIe devices; determining, in response to detecting a system management interrupt (SMI), whether or not a spurious reset has occurred for at least one of the PCIe devices; and recovering the at least one PCIe device if said determining indicates that a spurious reset has occurred for the at least one PCIe device.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: April 26, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Patent number: 11307907
    Abstract: Information handling systems (IHS) and methods are provided to automatically synchronize operating system (OS) and boot firmware languages. In one embodiment, a method may detect a change in an active OS language from a first language pack to a second language pack, notify the boot firmware that the active OS language was changed, and provide an identity of the second language pack to the boot firmware during OS runtime. When the IHS is subsequently rebooted, the active boot firmware language may be synchronized to the active OS language. In another embodiment, the method may detect a change in an active boot firmware language from a first language pack to a second language pack, notify the OS that the active boot firmware language was changed, and provide an identity of the second language pack to the OS during a pre-boot phase. When the OS is subsequently booted, the active OS language may be synchronized to the active boot firmware language.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: April 19, 2022
    Assignee: Dell Products L.P.
    Inventors: Shubham Kumar, Ibrahim Sayyed, Manjunath Gr, Debasish Nath, Balasingh P. Samuel, Michael W. Arms
  • Publication number: 20210240545
    Abstract: Information handling systems (IHS) and methods are provided to automatically synchronize operating system (OS) and boot firmware languages. In one embodiment, a method may detect a change in an active OS language from a first language pack to a second language pack, notify the boot firmware that the active OS language was changed, and provide an identity of the second language pack to the boot firmware during OS runtime. When the IHS is subsequently rebooted, the active boot firmware language may be synchronized to the active OS language. In another embodiment, the method may detect a change in an active boot firmware language from a first language pack to a second language pack, notify the OS that the active boot firmware language was changed, and provide an identity of the second language pack to the OS during a pre-boot phase. When the OS is subsequently booted, the active OS language may be synchronized to the active boot firmware language.
    Type: Application
    Filed: February 3, 2020
    Publication date: August 5, 2021
    Inventors: Shubham Kumar, Ibrahim Sayyed, Manjunath Gr, Debasish Nath, Balasingh P. Samuel, Michael W. Arms
  • Patent number: 10936460
    Abstract: A method includes invoking, by an embedded controller at an information handling system, a test procedure to evaluate functionality of motherboard resources at the information handling system. A result of the test procedure is displayed at a primary display device using a built in self test function incorporated at the primary display device.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: March 2, 2021
    Assignee: Dell Products, L.P.
    Inventors: Craig L. Chaiken, Matthew G. Page, Michael W. Arms, Dustin A. Combs, Chun Yi (Jadis) Yang
  • Patent number: 10866623
    Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect and recover from boot failures, such as no power failures and no POST failures, without suffering the information loss that typically occurs in conventional recovery methods. One embodiment of an IHS disclosed herein includes a system real-time clock (RTC) configured to maintain current date and time values, a host processor configured to execute boot firmware and perform a Power-On Self-Test (POST) during a boot process for the IHS, and an embedded controller (EC) configured to execute embedded controller firmware during the boot process to detect a no power failure or a no POST failure, and reset or remove power from the system RTC if a no power failure or a no POST failure is detected.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: December 15, 2020
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Publication number: 20200334045
    Abstract: Systems and methods are provided for supporting use of system BIOS components (e.g., such as BIOS debug messages, debugger firmware, UEFI drivers, etc.) that are stored separately from the remainder of system BIOS firmware for an information handling system. The system BIOS components may represent only a portion of the total BIOS firmware, and may be selectively retrieved and loaded from the separate storage into system memory when needed by the system BIOS for operating purposes (e.g., such as debugging operations).
    Type: Application
    Filed: April 18, 2019
    Publication date: October 22, 2020
    Inventors: Craig L. Chaiken, Michael W. Arms, Richard M. Tonry, Anand Prakash Joshi
  • Patent number: 10777296
    Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to dynamically detect and recover from thermally induced memory failures. Some embodiments include receiving an interrupt corresponding to a memory failure, detecting a current temperature of one or more memory components, and performing a series of memory tests on a specific block of memory within the memory components if the current temperature exceeds a maximum operating temperature specified for the memory components. Some embodiments include storing original contents of the specific block of memory within another memory component of the IHS, performing a first memory test on the specific block of memory at the current temperature, subsequently performing a second memory test on the specific block of memory at a temperature significantly lower than the current temperature, and determining that the memory failure is a thermally induced memory failure if the first memory test fails and the second memory test passes.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: September 15, 2020
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Publication number: 20200285534
    Abstract: Embodiments of information handling systems (HSs) and computer-implemented methods are provided herein to detect and recover from spurious PCIe device resets. One embodiment of a disclosed method is performed by a host processor of an IHS that includes a plurality of Peripheral Component Interconnect Express (PCIe) devices, each including a set of PCIe configuration registers containing configuration settings for the PCIe device. The disclosed method includes generating, in response to the IHS transitioning from a lower power state to a higher power state, a PCIe device table containing the configuration settings stored within the set of PCIe configuration registers for each of the PCIe devices; determining, in response to detecting a system management interrupt (SMI), whether or not a spurious reset has occurred for at least one of the PCIe devices; and recovering the at least one PCIe device if said determining indicates that a spurious reset has occurred for the at least one PCIe device.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 10, 2020
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Publication number: 20200258591
    Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to dynamically detect and recover from thermally induced memory failures. Some embodiments include receiving an interrupt corresponding to a memory failure, detecting a current temperature of one or more memory components, and performing a series of memory tests on a specific block of memory within the memory components if the current temperature exceeds a maximum operating temperature specified for the memory components. Some embodiments include storing original contents of the specific block of memory within another memory component of the IHS, performing a first memory test on the specific block of memory at the current temperature, subsequently performing a second memory test on the specific block of memory at a temperature significantly lower than the current temperature, and determining that the memory failure is a thermally induced memory failure if the first memory test fails and the second memory test passes.
    Type: Application
    Filed: February 8, 2019
    Publication date: August 13, 2020
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Patent number: 10732963
    Abstract: An information handling system operating an automated UEFI variable update management system may comprise a processor executing machine-readable executable code instructions of the automated UEFI variable update management system to save to a memory and execute a first plurality of UEFI variables included in a first terse executable image, to receive a second terse executable image including a second plurality of UEFI variables in a second preset order, wherein each of the first plurality of UEFI variables and the second plurality of UEFI variables including a variable value, and a variable key pointing to a variable value location in the memory, to compare the first plurality of UEFI variables to the second plurality of UEFI variables, to retrieve from the first terse executable image and store in a variable update map the first plurality of UEFI variables, to retrieve from the second terse executable image and store in the variable update map the second plurality of UEFI variables, and to store the variable
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: August 4, 2020
    Assignee: Dell Products, LP
    Inventors: Michael W. Arms, Justin L. Frodsham
  • Publication number: 20200159302
    Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to automatically detect and recover from boot failures, such as no power failures and no POST failures, without suffering the information loss that typically occurs in conventional recovery methods. One embodiment of an IHS disclosed herein includes a system real-time clock (RTC) configured to maintain current date and time values, a host processor configured to execute boot firmware and perform a Power-On Self-Test (POST) during a boot process for the IHS, and an embedded controller (EC) configured to execute embedded controller firmware during the boot process to detect a no power failure or a no POST failure, and reset or remove power from the system RTC if a no power failure or a no POST failure is detected.
    Type: Application
    Filed: November 16, 2018
    Publication date: May 21, 2020
    Inventors: Craig L. Chaiken, Michael W. Arms
  • Publication number: 20200073832
    Abstract: Systems and methods are provided that may be implemented to hide operating system kernel data in system management mode memory. An information handling system includes a system memory, central processing unit (CPU), and Basic Input Output System (BIOS). The CPU is operable in a system management mode and is programmable to specify an SMM region of the system memory that is only accessible when the CPU is operating in the SMM. The BIOS is programmed to save kernel data from a non-SMM region of the system memory to the SMM region and then clear the kernel data from the non-SMM region in response to an operating system (OS) generating a system management interrupt (SMI) and to restore the kernel data to the non-SMM region of the system memory from the SMM region in response to the OS generating a SMI.
    Type: Application
    Filed: August 28, 2018
    Publication date: March 5, 2020
    Inventors: Craig L. Chaiken, Michael W. Arms, Ricardo L. Martinez
  • Patent number: 10565141
    Abstract: Systems and methods are provided that may be implemented to hide operating system kernel data in system management mode memory. An information handling system includes a system memory, central processing unit (CPU), and Basic Input Output System (BIOS). The CPU is operable in a system management mode and is programmable to specify an SMM region of the system memory that is only accessible when the CPU is operating in the SMM. The BIOS is programmed to save kernel data from a non-SMM region of the system memory to the SMM region and then clear the kernel data from the non-SMM region in response to an operating system (OS) generating a system management interrupt (SMI) and to restore the kernel data to the non-SMM region of the system memory from the SMM region in response to the OS generating a SMI.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: February 18, 2020
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Michael W. Arms, Ricardo L. Martinez
  • Patent number: 10545769
    Abstract: A method performed by an information handling system, the method including bifurcating, by a processor of the information handling system, an I/O unit (IO unit) of the information handling system into a first root port and a second root port, wherein the first root port comprises a first pre-determined number of first lanes of the IO unit and the second root port comprises the first pre-determined number of second lanes of the IO unit. The method further including discovering, by the processor, a first I/O device (IO device) coupled to the IO unit, wherein the first IO device utilizes a first lane width that is greater than the first pre-determined number of lanes, and in response to discovering the first IO device, bifurcating, by the processor, the IO unit into a third root port, wherein the third root port comprises the first lanes and the second lanes.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 28, 2020
    Assignee: Dell Products, LP
    Inventors: Michael W. Arms, Anand P. Joshi, Justin L. Frodsham
  • Publication number: 20190384684
    Abstract: A method includes invoking, by an embedded controller at an information handling system, a test procedure to evaluate functionality of motherboard resources at the information handling system. A result of the test procedure is displayed at a primary display device using a built in self test function incorporated at the primary display device.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 19, 2019
    Inventors: Craig L. Chaiken, Matthew G. Page, Michael W. Arms, Dustin A. Combs, Chun Yi (Jadis) Yang