Patents by Inventor Michael W. Bright

Michael W. Bright has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5146497
    Abstract: This method of key distribution rekeys (605) a group of communication units (107) within an encrypted communication system with over-the-channel rekeying. The method uses a key management controller (101) to manage and distribute keys (1541) to a plurality of communication units and handle acknowledgments from the plurality of communication units that are delayed from receipt of the rekeying message. The rekeying message (615) is sent to any of the group of communication units (107) when an acknowledgment is not received (611) from one or more of the group of communication units (107).
    Type: Grant
    Filed: February 27, 1991
    Date of Patent: September 8, 1992
    Assignee: Motorola, Inc.
    Inventor: Michael W. Bright
  • Patent number: 5093860
    Abstract: This key management system effectively solves the key distribution problems of distance, time, operator error, and security risk by transferring encryption keys with appropriate system information between a key management controller (101) and a remote keyloader (109). The keyloader (109) is then coupled to a communication device to transfer (327) the keys and receive (329) identification information from the communication device. The keyloader (109) then sends (323) the information to the key management controller (101) that controls the distribution of the encryption keys and collection of the communication device identifications.
    Type: Grant
    Filed: September 27, 1990
    Date of Patent: March 3, 1992
    Assignee: Motorola, Inc.
    Inventors: Kurt W. Steinbrenner, Michael W. Bright
  • Patent number: 4914697
    Abstract: A cryptographic apparatus for encrypting and decrypting digital words includes a mechanism that permits a cipher algorithm to be electronically stored after the manufacture of the apparatus. The storing mechanism includes at least one electrically erasable, programmable gate array containing a portion of the cipher algorithm and at least one random access memory device coupled to the array for storing digital data generated by the algorithm. A mechanism which is coupled to the gate array and memory device controls the execution of the algorithm for each digital word thereby decrypting encrypted digital words and encrypting non-encrypted digital words.
    Type: Grant
    Filed: February 1, 1988
    Date of Patent: April 3, 1990
    Assignee: Motorola, Inc.
    Inventors: Ezzat A. Dabbish, John P. Byrns, Michael J. McClaughry, Larry C. Puhl, Daniel P. Brown, Eric F. Ziolko, Michael W. Bright
  • Patent number: 4893339
    Abstract: Disclosed is a synchronous secure communication system wherein an information signal is encrypted in an encryption means. The encrypted signal is compressed to allow the insertion of a synchronization signal, and the combined signals are transmitted. At the receiver, the synchronization signal is extracted and used to synchronize the receiver to the incoming data stream thereby improving receiver sensitivity and range.
    Type: Grant
    Filed: September 30, 1986
    Date of Patent: January 9, 1990
    Assignee: Motorola, Inc.
    Inventors: Michael W. Bright, Eric F. Ziolko, Alan L. Wilson, Michelle M. Bray, Harry A. Hennen, David L. Weiss
  • Patent number: 4893308
    Abstract: Disclosed is a method and apparatus for time companding a digital voice signal wherein, single bits are periodically removed from the digital voice signal, which is then compressed thereby forming a contiguous area of removed bits. A synchronization signal is inserted into this area and the combined signal is transmitted. At the receiver, the synchronization signal is extracted and is used to synchronize the receiver. The digital voice signal is then expanded and the removed bits are predicted and replaced.
    Type: Grant
    Filed: September 3, 1986
    Date of Patent: January 9, 1990
    Assignee: Motorola, Inc.
    Inventors: Alan L. Wilson, Michael W. Bright, Michelle M. Bray, Eric F. Ziolko, David L. Weiss
  • Patent number: 4754457
    Abstract: The transmitter in a digital communication system sends a synchronization sequence that uniquely identifies the polarity of the received data. From the received data, the receiver produces non-inverted and inverted polarity data streams that couple to like synchronization detectors. Only the detector to which the correct polarity data stream is coupled responds. Logic circuitry determines which detector responds and, accordingly, selects the polarity of received data to be further processed by the receiver.After polarity is established, both detectors monitor the received data stream of the selected polarity to determine whether synchronization shifts after having been initially established. Monitoring continues until terminated by other receiver circuits.
    Type: Grant
    Filed: September 3, 1986
    Date of Patent: June 28, 1988
    Assignee: Motorola, Inc.
    Inventors: Michael W. Bright, Alan L. Wilson
  • Patent number: 4747105
    Abstract: A detector locates a shift register sequence within a digital data stream by correlating the data stream with a sequence generated locally from a portion of the data stream. Error correction circuitry estimates errors that may have corrupted the sequence during transmission across a noisy channel and corrects them to the extent possible. The data stream and local sequence are correlated during an interval that is shifted either ahead or behind the portion of the error-corrected data stream used to initialize the local sequence generator, thereby avoiding the region during which short-term correlation between the data stream and local sequence would otherwise cause false indications of detection when only noise or random data is being received.
    Type: Grant
    Filed: September 3, 1986
    Date of Patent: May 24, 1988
    Assignee: Motorola, Inc.
    Inventors: Alan L. Wilson, Michael W. Bright, Eric F. Ziolko
  • Patent number: 4667327
    Abstract: Disclosed is an error corrector for a linear feedback shift register sequence employing an open loop linear feedback shift register (LFSR) having selected bits "tapped" and combined to form a feedback signal. The taps implement an orthogonal convolutional code that is inherently redundant, therefore, the transmission of parity bits is not required. The feedback signal is combined with the received synchronization signal to form an error estimate that is temporarily stored in a syndrome register. By majority voting a selected outputs of the syndrome register a reliable determination of a received error can be made. Once an error determination is made, a correction signal is generated to correct the bit in error thereby providing a high probability of initiating and maintaining synchronization.
    Type: Grant
    Filed: April 2, 1985
    Date of Patent: May 19, 1987
    Assignee: Motorola, Inc.
    Inventors: Michael W. Bright, Eric F. Ziolko, Alan L. Wilson