Abstract: A system for connecting signal wires between circuitry of a Field Programmable Gate Array (FPGA). When a connection cannot be made, the system attempts to move the circuitry to a different location in order to resolve the congestion. The system first attempts to move the circuitry to a different location at the same allocation level within the FPGA, and if the system is unsuccessful, it will then attempt to move all the circuitry at the allocation level of the circuitry causing the congestion to a new location within a next higher allocation level. This will continue until the top level is reached. When attempting to move the circuitry, the system first tries to place the circuitry in the closest area on one side or the other of the circuitry and then moves alternatingly outward away from the circuitry trying to find a suitable location.