Abstract: In one embodiment, a unique (or quasi unique) identifier can be received by an application store, or other on-line store, and the store can create a signed receipt that includes data desired from the unique identifier. This signed receipt is then transmitted to a device that is running the application obtained from the on-line store and the device can verify the receipt by deriving the unique (or quasi-unique) identifier from the signed receipt and comparing the derived identifier with the device identifier stored on the device, or the vendor identifier assigned to the application vendor.

Abstract: A computational pixel imaging device can include multiple digitizing counters per pixel that can be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

Abstract: A computational pixel imaging device can include multiple digitizing counters per pixel that can be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

Abstract: A computational pixel imaging device can include multiple counters per pixel that can be used to acquire in-pixel histogram data representative of a signal detected by a pixels detector. Multiple pixel counters can also be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

Abstract: A computational pixel imaging device that includes an array of pixel integrated circuits for event-based detection and imaging. Each pixel may include a digital counter that accumulates a digital number, which indicates whether a change is detected by the pixel. The counter may count in one direction for a portion of an exposure and count in an opposite direction for another portion of the exposure. The imaging device may be configured to collect and transmit key frames at a lower rate, and collect and transmit delta or event frames at a higher rate. The key frames may include a full image of a scene, captured by the pixel array. The delta frames may include sparse data, captured by pixels that have detected meaningful changes in received light intensity. High speed, low transmission bandwidth motion image video can be reconstructed using the key frames and the delta frames.

Abstract: A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Abstract: A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the lightfield, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Abstract: A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Abstract: A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Abstract: A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Abstract: A computational pixel imaging device can include multiple digitizing counters per pixel that can be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down- sampling.

Abstract: When imaging bright objects, a conventional detector array can saturate, making it difficult to produce an image with a dynamic range that equals the scene's dynamic range. Conversely, a digital focal plane array (DFPA) with one or more m-bit counters can produce an image whose dynamic range is greater than the native dynamic range. In one example, the DFPA acquires a first image over a relatively brief integration period at a relatively low gain setting. The DFPA then acquires a second image over longer integration period and/or a higher gain setting. During this second integration period, counters may roll over, possibly several times, to capture a residue modulus 2m of the number of counts (as opposed to the actual number of counts). A processor in or coupled to the DFPA generates a high-dynamic range image based on the first image and the residues modulus 2m.

Abstract: A computational pixel imaging device that includes an array of pixel integrated circuits for event-based detection and imaging. Each pixel may include a digital counter that accumulates a digital number, which indicates whether a change is detected by the pixel. The counter may count in one direction for a portion of an exposure and count in an opposite direction for another portion of the exposure. The imaging device may be configured to collect and transmit key frames at a lower rate, and collect and transmit delta or event frames at a higher rate. The key frames may include a full image of a scene, captured by the pixel array. The delta frames may include sparse data, captured by pixels that have detected meaningful changes in received light intensity. High speed, low transmission bandwidth motion image video can be reconstructed using the key frames and the delta frames.

Abstract: When imaging bright objects, a conventional detector array can saturate, making it difficult to produce an image with a dynamic range that equals the scene's dynamic range. Conversely, a digital focal plane array (DFPA) with one or more m-bit counters can produce an image whose dynamic range is greater than the native dynamic range. In one example, the DFPA acquires a first image over a relatively brief integration period at a relatively low gain setting. The DFPA then acquires a second image over longer integration period and/or a higher gain setting. During this second integration period, counters may roll over, possibly several times, to capture a residue modulus 2?? of the number of counts (as opposed to the actual number of counts). A processor in or coupled to the DFPA generates a high-dynamic range image based on the first image and the residues modulus 2??.

Abstract: A computational pixel imaging device can include multiple counters per pixel that can be used to acquire in-pixel histogram data representative of a signal detected by a pixels detector. Multiple pixel counters can also be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

Abstract: A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Abstract: A computational pixel imaging device can include multiple digitizing counters per pixel that can be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

Abstract: A computational pixel imaging device that includes an array of pixel integrated circuits for event-based detection and imaging. Each pixel may include a digital counter that accumulates a digital number, which indicates whether a change is detected by the pixel. The counter may count in one direction for a portion of an exposure and count in an opposite direction for another portion of the exposure. The imaging device may be configured to collect and transmit key frames at a lower rate, and collect and transmit delta or event frames at a higher rate. The key frames may include a full image of a scene, captured by the pixel array. The delta frames may include sparse data, captured by pixels that have detected meaningful changes in received light intensity. High speed, low transmission bandwidth motion image video can be reconstructed using the key frames and the delta frames.

Abstract: When imaging bright objects, a conventional detector array can saturate, making it difficult to produce an image with a dynamic range that equals the scene's dynamic range. Conversely, a digital focal plane array (DFPA) with one or more m-bit counters can produce an image whose dynamic range is greater than the native dynamic range. In one example, the DFPA acquires a first image over a relatively brief integration period at a relatively low gain setting. The DFPA then acquires a second image over longer integration period and/or a higher gain setting. During this second integration period, counters may roll over, possibly several times, to capture a residue modulus 2m of the number of counts (as opposed to the actual number of counts). A processor in or coupled to the DFPA generates a high-dynamic range image based on the first image and the residues modulus 2m.

Abstract: A digital focal plane array includes an all-digital readout integrated circuit in combination with a detector array. The readout circuit includes unit cell electronics, orthogonal transfer structures, and data handling structures. The unit cell electronics include an analog to digital converter. Orthogonal transfer structures enable the orthogonal transfer of data among the unit cells. Data handling structures may be configured to operate the digital focal plane array as a data encryptor/decipherer. Data encrypted and deciphered by the digital focal plane array need not be image data.