Abstract: Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing structure having an electrically insulating layer that carries redistribution electrical connections having redistributed bond pads and conductive traces and which is supported from beneath by a support layer are configured for securing to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. A semiconductor device and a semiconductor assembly are also provided.

Abstract: Microelectronic devices having an EMI shield, systems including such microelectronic devices, and methods for manufacturing such microelectronic devices. One embodiment of a microelectronic device comprises an imaging system comprising a microelectronic die, an optics assembly, and an electromagnetic interference (EMI) shield. The microelectronic die includes an image sensor, processing components electrically coupled to the image sensor, a first interconnect electrically isolated from the processing components, and a second interconnect electrically coupled to the processing components. The optics assembly is aligned with the image sensor, and the electromagnetic interference (EMI) shield is between the optics assembly and the processing components. The EMI shield is electrically coupled to the first interconnect.

Abstract: A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of an electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

Abstract: Microelectronic devices having an EMI shield, systems including such microelectronic devices, and methods for manufacturing such microelectronic devices. One embodiment of a microelectronic device comprises an imaging system comprising a microelectronic die, an optics assembly, and an electromagnetic interference (EMI) shield. The microelectronic die includes an image sensor, processing components electrically coupled to the image sensor, a first interconnect electrically isolated from the processing components, and a second interconnect electrically coupled to the processing components. The optics assembly is aligned with the image sensor, and the electromagnetic interference (EMI) shield is between the optics assembly and the processing components. The EMI shield is electrically coupled to the first interconnect.

Abstract: A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of the electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

Abstract: Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing structure having an electrically insulating layer that carries redistribution electrical connections having redistributed bond pads and conductive traces and which is supported from beneath by a support layer are configured for securing to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device A semiconductor device and a semiconductor assembly are also provided.

Abstract: Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing segments having an electrically insulating layer that carries redistribution circuitry and redistributed bond pads and which is supported from beneath by a support layer are secured to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. The methods provide increased accuracy with which segments are placed on a semiconductor die relative to the placement accuracies provided when pick-and-place equipment is used to position conventional grid array substrates relative to semiconductor dice.

Abstract: Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing segments having an electrically insulating layer that carries redistribution circuitry and redistributed bond pads and which is supported from beneath by a support layer are secured to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. The methods provide increased accuracy with which segments are placed on a semiconductor die relative to the placement accuracies provided when pick-and-place equipment is used to position conventional grid array substrates relative to semiconductor dice.

Abstract: A semiconductor device assembly and method of making the devices are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of the electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

Abstract: An apparatus and method of removably interconnecting a reduced-sized memory card with an extension member. A locking mechanism may be formed in a peripheral end portion of the reduced-sized memory card that may include an entry surface and a ledge. The extension member may include a biasing portion that slidably engages the entry surface and removably interconnects with the ledge. With this arrangement, the extension member may easily be secured and removed from the reduced-sized memory card, allowing easy interchangeability between a standard-sized socket of one electronic device and a reduced-sized socket of another electronic device.

Abstract: An apparatus and method of removably interconnecting a reduced-sized memory card with an extension member. The locking mechanism may be formed in a peripheral end portion of the reduced-sized memory card that may include an entry surface and a ledge. The extension member may include a biasing portion that slidably engages the entry surface and removable interconnects with the ledge. With this arrangement, the extension member may easily be secured and removed from the reduced-sized memory card, allowing easy interchangeability between a standard-sized socket of one electronic device and a reduced-sized socket of another electronic device.

Abstract: Methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment and semiconductor device packages formed in accordance with such methods. Circuitry-bearing segments having an electrically insulating layer that carries redistribution circuitry and redistributed bond pads and which is supported from beneath by a support layer are secured to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. The method provides increased accuracy with which segments are placed on a semiconductor die relative to the placement accuracies provided when pick-and-place equipment is used to position conventional grid array substrates relative to semiconductor dice.

Abstract: An apparatus and method of removably interconnecting a reduced-sized memory card with an extension member. The locking mechanism may be formed in a peripheral end portion of the reduced-sized memory card that may include an entry surface and a ledge. The extension member may include a biasing portion that slidably engages the entry surface and removable interconnects with the ledge. With this arrangement, the extension member may easily be secured and removed from the reduced-sized memory card, allowing easy interchangeability between a standard-sized socket of one electronic device and a reduced-sized socket of another electronic device.

Abstract: The present invention encompasses a system for at least partially drying or curing wet glass strand as it is being wound into a package wherein streams of heated gas, such as air, are directed into contact with the outer layer of strand being collected on a rotating collet. Preferably, the streams of gas have a specific orientation with respect to the layers of strand and are supplied at predetermined temperatures and velocities to maximize the drying effect.

Abstract: A process for manufacturing glass filaments in which the bushing bottom plate has tips depending therefrom and each tip has a plurality of orifices from which glass filaments are drawn. The tips flood individually on start-up or during operation, and the flood results in a single composite filament being formed from the orifices of that tip. The composite filament beads down rapidly and is subsequently separated into individual filaments by the use of a fluid spray directed against the composite filament at the tip lower face. The fluid spray is utilized to momentarily quench the composite filament and is terminated once separation occurs. Subsequent filament drawing is accomplished without the use of a cooling fluid and by the use of known heat exchange means, e.g., a flow of cooling gas.