Abstract: A power down circuit that provides an on-state electrical current to a load circuit that does not depend significantly on power control signal logic levels and that provides a widened off-state control signal voltage range. A power down circuit according to the present teachings includes a switching transistor for providing an electrical current to a load circuit in an on-state and for interrupting the electrical current in an off-state and that includes a circuit for operating the switching transistor in a triode region during the on-state.

Abstract: A mixing circuit is described in connection with various embodiments.

Abstract: A mixing circuit is described in connection with various embodiments.

Abstract: Techniques for shaping the drive signal of a mixing device to overcome a characteristic capacitance of the control terminal of the mixing device and reduce the time the mixing device is in an intermediate state between its on and off states.

Abstract: An envelope detector that does not generate an undesirable DC offset at its DC output signal. An envelope detector according to the present teachings includes a circuit for performing a DC level shift on an AC input signal applied to the envelope detector such that a magnitude of the DC level shift is proportional to a peak envelope of the AC input signal.

Abstract: A differential amplifier that employs mutually coupled inductors to provide desired levels of inductance in a substantially smaller form factor in comparison to individual inductor components. Mutually coupled inductors according to the present teachings may also be used to increase common mode rejection in a differential amplifier.

Abstract: A balun including a pair of metal coil structures and an intervening dielectric layer having a thickness that is selected in response an operating frequency of the balun. The thickness of the dielectric layer may be used to tune the balun and enhance its self-inductance at its operating frequency. In addition, a balun with a pair of metal coil structures formed with an asymmetry that is selected to minimize an amplitude error in its output signal. A balun according the present teachings may also include an asymmetry in the positioning of its output terminals. The positioning of the output terminals of a balun may be adjusted to minimize phase errors at its output signal.

Abstract: A protection circuit for transistor that avoids the use of performance hindering resistors or diodes or capacitors includes a routing circuit for routing an electrostatic discharge current around the transistor and a detection circuit that switches on the routing circuit when a breakdown current in the transistor exceeds a threshold.

Abstract: A frequency mixer that generates out of phase sum signals and uses the out of phase relationship to absorb sum signal energy in an energy absorbing component. A frequency mixer according to the present teachings includes a set of mixing devices that generate a first sum signal and a second sum signal in response to an input signal and a drive signal such that the first sum signal is out of phase in relation to the second sum signal. A frequency mixer according to the present teachings includes an energy absorbing component that absorbs the out of phase sum terms from the mixing devices.

Abstract: A two-stage amplifier that includes a first stage and a second stage and a first component and a second component coupled in series between the first and second stages. The first component is selected to provide AC decoupling of the first and second stages and the second component is selected to provide for the stability of the amplifier while avoiding excessive power dissipation and/or negative impact on overall gain.

Abstract: A power amplifier output stage that provides multiple power states and mechanisms for enhancing the efficiency of each of its power states. A power amplifier output stage according to the present techniques includes a first output device for driving a load in a first power state and a second output device for driving the load in a second power state along with a matching network for the first power state and a circuit for adapting the matching network to the second power state.

Abstract: A multiple gain state amplifier that provides advantageous port matching, noise characteristics, and current savings while not imposing a phase shift in the amplifier transfer function between gain states. A multiple gain state amplifier according to the present teachings includes amplifier circuit configured for a first gain state using a first transistor and configured for a second gain state using a second transistor and a circuit for changing the amplifier circuit between the first gain state and the second gain state by selectively applying a bias to the first transistor and a bias to the second transistor.

Abstract: A multiple gain state amplifier that provides advantageous port matching, noise characteristics, and current savings while not imposing a phase shift in the amplifier transfer function between gain states. A multiple gain state amplifier according to the present teachings includes amplifier circuit configured for a first gain state using a first transistor and configured for a second gain state using a second transistor and a circuit for changing the amplifier circuit between the first gain state and the second gain state by selectively applying a bias to the first transistor and a bias to the second transistor.

Abstract: A switching circuit that employs equity voltage division among a series of transistors to reduce the likelihood that the withstanding voltages of individual transistors will be exceeded. A switching circuit according to the present teachings include a series of transistors and circuitry for biasing the transistors such that a voltage input to the switching circuit divides substantially equally among the transistors when the transistors are in an off state.

Abstract: FET mixers requiring relatively low local oscillator power levels and having excellent isolation of the local oscillator signal relative to the radio and intermediate frequency signal. The mixer comprises a first and second FET transistor (Q1, Q2) having their gates and sources connected together such that the first and second FET transistors are in series; a local oscillator input circuit; a coupling network comprising a transmission line balun; a diplexer circuit; and a bias circuit. In one aspect, the transmission line balun divides the voltage of an incident traveling wave equally between the first and second transmission line components, and sums the currents of traveling waves generated by the transmission line components to generate an exitant traveling wave signal. The RF signal is completely reflected by each the FET transistors with no phase shift when they are nonconducting (OFF), and completely reflected by each of the FET transistors with a 180.degree.

Abstract: Apparatus for reducing intermodulation distortion in a mixer output signal provides for back-to-back serial connected FET transistors joined at gate and source terminals and cancels intermodulation distortion. In one embodiment the apparatus provides first and second FET having their gates tied to one another and their sources tied to one another such that the FETs are connected back-to-back in series and have equal gate-to-source voltages and FET drain-to-source voltage that are equal in magnitude but opposite in sign to the second FET drain-to-source voltage. A control voltage, such as a local oscillator voltage signal is applied between the FET gate terminals and the FET source terminals to switch the conduction state of the serially connected FETs between a conducting state and a non-conducting state.

Abstract: A double balanced dual-quad transformer dual field effect transistor (FET) mixer is disclosed using a first and second (FET) which have their gates electrically connected together, such that the first and second FET are connected in series. The mixer achieves improved isolation by using a first and second diplexer, and an RF and IF coupling network which comprises a flux-coupled IF transformer and a transmission line RF balun.

Abstract: A mixer comprising four FET transistors in a MMIC, a reflection transformer having tri-filar windings, an IF balun, an RF balun, a local oscillator balun, a pair of load resistors, a pair of series resistors, and a pair of series capacitors. The mixer is packaged in a lidded header similar to a large TO-8 metal package.

Abstract: A method for determining ectopic pregnancy in pregnant persons comprises obtaining a test sample; and determining the absence of a fetal restricted antigen in the sample. The sample is obtained from the vaginal cavity in the vicinity of the cervical canal or the cervical os. One fetal restricted antigen is fetal fibronectin. In one embodiment of this invention, the sample is contacted with an insoluble support to which anti-(fetal restricted antigen) antibody is adhered, and the fetal restricted antigen binding to the support is determined. Alternatively, a class of substances of which the fetal restricted antigen is a member is captured with a general binding antibody such as an anti-(fibronectin) antibody; an anti-(fetal restricted antigen) antibody such as anti-(fetal fibronectin) antibody is bound to the support; and the absence of binding with fetal restricted antigen is determined. Competition or sandwich assay procedures can be used. Reagents and reagent kits are also included.