Abstract: The present disclosure relates to semiconductor components. The teachings thereof may be embodied in a lead frame for a semiconductor component including: a frame having a recess; an electrically conductive connecting element for establishing an electrical connection to the semiconductor component arranged in the recess; and an insulating element arranged in the recess and mechanically connecting the connecting element to the frame and electrically insulating it from the frame.

Abstract: The present disclosure relates to semiconductor components. The teachings thereof may be embodied in a lead frame for a semiconductor component including: a frame having a recess; an electrically conductive connecting element for establishing an electrical connection to the semiconductor component arranged in the recess; and an insulating element arranged in the recess and mechanically connecting the connecting element to the frame and electrically insulating it from the frame.

Abstract: A package includes at least one electronic component mounted on an imprinted substrate. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Such features may be formed by imprinting in one operation rather than sequentially. Conductor features, such as trenches, holes, and planes, may be formed of different sizes simultaneously. One or more vias may be formed in one or more trenches. Methods of fabricating an imprinted substrate, as well as application of the imprinted package to an electronic assembly, are also described.

Abstract: A package includes at least one electronic component mounted on a substrate formed through imprinting. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Conductor features of different geometries may be formed by imprinting them simultaneously on one or both surfaces of an imprintable tape. Fabrication apparatus and methods, as well as application of the imprinted package to an electronic assembly, are also described.

Abstract: A circuit package may include an upper surface of first conductive elements and second conductive elements. The first conductive elements may receive input/output signals from respective conductive elements of an integrated circuit die, and the second conductive elements may receive a first plurality of the input/output signals from respective ones of the first conductive elements. A lower surface of the package may include third conductive elements, the third conductive elements to receive a second plurality of the input/output signals from respective other ones of the first conductive elements.

Abstract: A package includes at least one electronic component mounted on a substrate formed through imprinting. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Conductor features of different geometries may be formed by imprinting them simultaneously on one or both surfaces of an imprintable tape. Fabrication apparatus and methods, as well as application of the imprinted package to an electronic assembly, are also described.

Abstract: A circuit package may include an upper surface of first conductive elements and second conductive elements. The first conductive elements may receive input/output signals from respective conductive elements of an integrated circuit die, and the second conductive elements may receive a first plurality of the input/output signals from respective ones of the first conductive elements. A lower surface of the package may include third conductive elements, the third conductive elements to receive a second plurality of the input/output signals from respective other ones of the first conductive elements.

Abstract: A circuit package may include an upper surface of first conductive elements and second conductive elements. The first conductive elements may receive input/output signals from respective conductive elements of an integrated circuit die, and the second conductive elements may receive a first plurality of the input/output signals from respective ones of the first conductive elements. A lower surface of the package may include third conductive elements, the third conductive elements to receive a second plurality of the input/output signals from respective other ones of the first conductive elements.

Abstract: A package includes at least one electronic component mounted on a substrate formed through imprinting. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Conductor features of different geometries may be formed by imprinting them simultaneously on one or both surfaces of an imprintable tape. Fabrication apparatus and methods, as well as application of the imprinted package to an electronic assembly, are also described.

Abstract: Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.

Abstract: Numerous embodiments of a method and apparatus for forming an imprinting tool are disclosed. In one embodiment, an apparatus for forming a substrate-imprinting tool comprises a build platform configured to receive material, a first mold formed on the build platform, the first mold having first mold feature surfaces, and a second mold formed on the first mold feature surfaces, wherein at least a portion of the second mold is metalized.

Abstract: Numerous embodiments of a method and apparatus for forming an imprinting tool are disclosed. In one embodiment, a method of forming an imprinting tool comprises forming a first mold by use of one or more printing processes, forming a second mold from the first mold, and forming an imprinting tool from the second mold, where the imprinting tool is formed at least in part by metalizing at least a portion of the second mold.

Abstract: Numerous embodiments of a method and apparatus for forming a substrate are disclosed. In one embodiment, a method for substrate fabrication comprises imprinting one or more features on a substrate, depositing a protective layer on a substantial portion of the top surface of the substrate, applying a metal filled paste to at least a portion of the one or more features, removing a substantial portion of the protective layer, and curing the metal filled paste to form one or more conductive structures.

Abstract: A electrical interface for an electronic package, using lands on the package which are non-planar with metal layers within the package. This non-planar or tilted land grid array (TLGA) package is assembled with a complementary TLGA socket to make electronic connection to the package.

Abstract: An article of manufacture and system, as well as fabrication methods therefore, may include a plurality of lands disposed on a surface of a substrate wherein the lands are oriented at an angle to the surface of the substrate and further wherein the substrate is formed of conductive layers that are formed such that a non-conductive layer does not interpose between the conductive layers and their coupling.

Abstract: An embodiment of the present invention is a technique to provide a substrate with enhanced strength. A kaolin filler is added to an epoxy resin. The kaolin filler is mixed with the epoxy resin to form a mixture. A substrate is formed from the mixture. The substrate is processed in a package containing a semiconductor device.

Abstract: A system may include a coreless substrate, a layer of material attached to the substrate, the layer of material having a lower elastic modulus than the substrate, an interposer coupled to the layer of material, and a capacitive layer coupled to the interposer.

Abstract: A system may include a pre-formed portion of underfill material defining openings. The openings may be configured to pass electrical interconnects for coupling an integrated circuit die to a portion of a substrate.

Abstract: A circuit package may include an upper surface of first conductive elements and second conductive elements. The first conductive elements may receive input/output signals from respective conductive elements of an integrated circuit die, and the second conductive elements may receive a first plurality of the input/output signals from respective ones of the first conductive elements. A lower surface of the package may include third conductive elements, the third conductive elements to receive a second plurality of the input/output signals from respective other ones of the first conductive elements.

Abstract: Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.