Patents by Inventor Michael Wise

Michael Wise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7270884
    Abstract: Si, Al, Al plus TiN, and IrO2 are used as adhesion layers to prevent peeling of noble metal electrodes, such as Pt, from a silicon dioxide (SiO2) substrate in capacitor structures of memory devices.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: September 18, 2007
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Jingyu Lian, Kwong Hon Wong, Michael Wise, Young Limb, Nicolas Nagel
  • Publication number: 20070120735
    Abstract: A method and system for determining a geolocation of an object includes collecting a positioning signal including a predetermined message data segment. A time of arrival of the predetermined message data segment may be determined in the positioning signal. Information based on the time of arrival may be provided for determination of a geolocation of an object. The time of arrival of the predetermined message data segment may be determined based on a time search for the predetermined message data segment in the positioning signal.
    Type: Application
    Filed: December 22, 2006
    Publication date: May 31, 2007
    Applicant: Fast Location.Net, LLC
    Inventors: Patrick Bromley, Louis Jandrell, Michael Wise
  • Publication number: 20070022756
    Abstract: A method for controlling a turbine-generator including: detecting a power-load unbalance between a turbine and a generator; measuring the duration of a power-load unbalance; measuring the rate of loss of an electrical load; and regulating steam flow through the turbine responsive to the rate of loss of an electrical load and the duration of the power-load unbalance; all of which results in more accurate and robust control of turbine-generator speed.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 1, 2007
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Sheldon Abelson, Michael Wise, Michael Molitor
  • Patent number: 7091103
    Abstract: CMP of integrated circuits containing DRAM arrays with trench capacitors fill the trenches with oxide, resulting in a an array of oxide structures that is dense compared with the concentration in the surrounding support structures and therefore has a higher loading. A conformal layer is deposited over the wafer, increasing the loading in the array, but filling in spaces between active areas. A blanket etch removes material in both the array and the supports. A block etch balances the amount of material in the array and the supports. A supplementary oxide deposition in the array fills spaces between the structures to a nearly uniform density.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: August 15, 2006
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corporation
    Inventors: Jochen Beintner, Laertis Economikos, Michael Wise, Andreas Knorr
  • Patent number: 6945826
    Abstract: A safety electrical plug has two-part prongs. Each prong has a distal portion that is electrically insulated and a proximal portion that is conductive. Substantially full insertion of the plug into a receptacle is required to establish an electrical connection between the prongs and the receptacle contacts. This limits the chance of electric shocking by human or animal engagement of the exposed portions of the prongs subsequent to only partial insertion of the plug into the receptacle, and signals the partially-inserted condition when subsequent attempts to operate an electrical appliance connected to the plug fails. The conductive prong portions may be inserts in a nonconductive base, or be the entire proximal portions, which may optionally mount a strip of non-conductive material along their edges.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: September 20, 2005
    Inventor: Charles Michael Wise
  • Publication number: 20050190911
    Abstract: An initialization vector (IV) is employed to decrypt a block of a stream that has been encrypted with Cypher Block Chaining (CBC) encryption, without requiring decryption of previous blocks within the stream. For example, a listener who accesses a distribution point to retrieve encrypted content authenticates himself to an application server that regulates access to encrypted content on the distribution point, and responsively receives a key. The listener then requests access to a reference point within the encrypted content stream somewhere after its beginning (e.g., using preview clips). The distribution point relates the reference point to a corresponding block of the encrypted stream, and identifies an IV previously used for encryption of that block. The distribution point provides the associated encrypted block of content and the IV to the listener to enable mid-stream rendering of the encrypted content, without requiring the listener to decrypt previous blocks within the encrypted stream.
    Type: Application
    Filed: December 22, 2004
    Publication date: September 1, 2005
    Inventors: David Pare, David Biderman, Stephen Loomis, Scott Brown, Michael Wise, David Wexelblat, Conor Cahill, David Bill
  • Publication number: 20050190915
    Abstract: An initialization vector (IV) is employed to decrypt a block of a stream that has been encrypted with Cypher Block Chaining (CBC) encryption, without requiring decryption of previous blocks within the stream. For example, a listener who accesses a distribution point to retrieve encrypted content authenticates himself to an application server that regulates access to encrypted content on the distribution point, and responsively receives a key. The listener then requests access to a reference point within the encrypted content stream somewhere after its beginning (e.g., using preview clips). The distribution point relates the reference point to a corresponding block of the encrypted stream, and identifies an IV previously used for encryption of that block. The distribution point provides the associated encrypted block of content and the IV to the listener to enable mid-stream rendering of the encrypted content, without requiring the listener to decrypt previous blocks within the encrypted stream.
    Type: Application
    Filed: December 22, 2004
    Publication date: September 1, 2005
    Inventors: David Pare, David Biderman, Stephen Loomis, Scott Brown, Michael Wise, David Wexelblat, Conor Cahill, David Bill
  • Publication number: 20050162314
    Abstract: A method and system for determining a geolocation of an object includes collecting a positioning signal including a predetermined message data segment. A time of arrival of the predetermined message data segment may be determined in the positioning signal. Information based on the time of arrival may be provided for determination of a geolocation of an object. The time of arrival of the predetermined message data segment may be determined based on a time search for the predetermined message data segment in the positioning signal.
    Type: Application
    Filed: March 17, 2005
    Publication date: July 28, 2005
    Inventors: Patrick Bromley, Louis Jandrell, Michael Wise
  • Publication number: 20050023590
    Abstract: A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 3, 2005
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
  • Patent number: 6821865
    Abstract: A method of forming deep isolation trenches in the fabrication of ICs is disclosed. The substrate is prepared with deep isolation trenches. The isolation trenches are partially filled with a first dielectric material. An etch mask layer is deposited on the substrate and used to remove excess first dielectric material on the surface of the substrate. The isolation trenches are then completely filled with a second dielectric material. Excess second dielectric material is then removed from the surface of the substrate.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: November 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Michael Wise, Andreas Knorr
  • Publication number: 20040219840
    Abstract: A safety electrical plug has two-part prongs. Each prong has a distal portion that is electrically insulated and a proximal portion that is conductive. Substantially full insertion of the plug into a receptacle is required to establish an electrical connection between the prongs and the receptacle contacts. This limits the chance of electric shocking by human or animal engagement of the exposed portions of the prongs subsequent to only partial insertion of the plug into the receptacle, and signals the partially-inserted condition when subsequent attempts to operate an electrical appliance connected to the plug fails. The conductive prong portions may be inserts in a nonconductive base, or be the entire proximal portions, which may optionally mount a strip of non-conductive material along their edges.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 4, 2004
    Inventor: Charles Michael Wise
  • Patent number: 6812092
    Abstract: A Dynamic Random Access Memory is fabricated in a semiconductor body of a first conductivity type in which there have been formed an array of memory cells which each include a trench capacitor and a vertical Insulated Gate Field Effect Transistor (IGFET). Each IGFET includes first and second output regions of a second opposite conductivity type and a gate which is separated from a surface of the semiconductor body by a gate dielectric layer. A gate electrode connected to the gate is formed using a Damascene process with insulating sidewall spacer regions being formed before the gate electrode is formed. Borderless contacts, which are self aligned, are made to the first output regions of each transistor using a Damascene process.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: November 2, 2004
    Assignee: Infineon Technologies
    Inventors: Mihel Seitz, Michael Wise, Christian Dubuc
  • Publication number: 20040197984
    Abstract: Si, Al, Al plus TiN, and Ir02 are used as adhesion layers to prevent peeling of noble metal electrodes, such as Pt, from a silicon dioxide (5i02) substrate in capacitor structures of memory devices.
    Type: Application
    Filed: March 17, 2004
    Publication date: October 7, 2004
    Applicants: Infineon Technologies North America Corp., International Business Machines Corp.
    Inventors: Jingyu Lian, Kwong Hon Wong, Michael Wise, Young Limb, Nicolas Nagel
  • Publication number: 20040197576
    Abstract: Si, Al, Al plus TiN, and Ir02 are used as adhesion layers to prevent peeling of noble metal electrodes, such as Pt, from a silicon dioxide (5i02) substrate in capacitor structures of memory devices.
    Type: Application
    Filed: April 7, 2003
    Publication date: October 7, 2004
    Applicants: Infineon Technologies North America Corp., International Business Machines Corporation
    Inventors: Jingyu Lian, Kwong Hon Wong, Michael Wise, Young Limb, Nicolas Nagel
  • Patent number: 6794705
    Abstract: A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: September 21, 2004
    Assignee: Infineon Technologies AG
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
  • Patent number: 6775390
    Abstract: A headset has one or two earpieces, an adjustable microphone boom, and a means for securing the headset to the user. The earpiece includes a speaker element for generating sound and a sound funneling device for funneling sound from the speaker element to an ear canal of the user. The sound funneling device rests within a concha and at the entrance of the ear canal for funneling sound and for stabilizing the earpiece against an ear of the user. In the preferred embodiment, the sound funneling device includes a first end which is open-ended and facing the speaker element, and a second end which includes one or more apertures and rests at the entrance of the ear canal. The first end has a circumference which is larger than a circumference of the second end which focuses the sound from the speaker element to the ear canal. A speaker cushion is configured to fit around the speaker element and the sound funneling device and preferably provides a means for coupling the speaker element to the sound funneling device.
    Type: Grant
    Filed: December 24, 2001
    Date of Patent: August 10, 2004
    Assignee: Hello Direct, Inc.
    Inventors: Peter Schmidt, Jeff Jones, John Magnasco, Joseph Myatt, Michael Wise
  • Publication number: 20040126986
    Abstract: A method of forming deep isolation trenches in the fabrication of ICs is disclosed. The substrate is prepared with deep isolation trenches. The isolation trenches are partially filled with a first dielectric material. An etch mask layer is deposited on the substrate and used to remove excess first dielectric material on the surface of the substrate. The isolation trenches are then completely filled with a second dielectric material. Excess second dielectric material is then removed from the surface of the substrate.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventors: Michael Wise, Andreas Knorr
  • Publication number: 20040110380
    Abstract: CMP of integrated circuits containing DRAM arrays with trench capacitors fill the trenches with oxide, resulting in a an array of oxide structures that is dense compared with the concentration in the surrounding support structures and therefore has a higher loading. A conformal layer is deposited over the wafer, increasing the loading in the array, but filling in spaces between active areas. A blanket etch removes material in both the array and the supports. A block etch balances the amount of material in the array and the supports. A supplementary oxide deposition in the array fills spaces between the structures to a nearly uniform density.
    Type: Application
    Filed: December 9, 2002
    Publication date: June 10, 2004
    Applicants: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Jochen Beintner, Laertis Economikos, Michael Wise, Andreas Knorr
  • Patent number: 6696759
    Abstract: A semiconductor structure includes a diamond-like carbon layer as a polish-stop for patterning a metal level into an inter-level dielectric substrate in a damascene process flow. The semiconductor structure includes a substrate having a dielectric layer followed by the diamond-like carbon layer on a surface thereof. The diamond-like carbon layer is used as a hard-mask for forming conductive metal features from grown substrate material that fills a plurality of openings in the substrate, therein forming a semiconductor island structure, The semiconductor structure has a planar surface at the diamond-like carbon layer and the grown substrate material, whereby the diamond-like carbon polish-stop layer allows for over-planarization of the semiconductor island structure to provide an improved planar surface having a sufficient decrease in topography.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: February 24, 2004
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Lawrence A. Clevenger, Louis L. C. Hsu, Jeremy K. Stephens, Michael Wise
  • Patent number: D482359
    Type: Grant
    Filed: October 6, 2001
    Date of Patent: November 18, 2003
    Inventors: Peter Skillman, Jeffrey C. Hawkins, Michael Wise, John Raff, Daniel Sung-Hwe Kim, Dennis Boyle, Charles R. Lewis, Jr.