Patents by Inventor Michael Z. Chui

Michael Z. Chui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9002692
    Abstract: In accordance with an exemplary simulation technique, an improved selective application of Newton-Raphson iterations can improve accuracy while ensuring good performance. In this method, selectively applying Newton-Raphson iteration in a simulation of a unit of the integrated circuit design can include determining second order effects to define a linearity value. Newton-Raphson iteration is performed when the linearity value is less than a linearity threshold and convergence of the simulation is not achieved.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: April 7, 2015
    Assignee: Synopsys, Inc.
    Inventors: He Dong, Michael Z. Chui, Shan Yuan
  • Patent number: 8868395
    Abstract: In a fast simulation technique, the output node of a power supply module of the integrated circuit can be designated as an ideal power node. At this point, the power supply module can be designated a fan-in block and any blocks connected to the power node can be designated fan-out blocks. Then, DC initialization and transient simulation for each time step can be performed for the circuit. During the transient simulation, any inter-relationship of the fan-out blocks can be determined and a sensitivity model can be calculated for each fan-out block. Because the power node is designated as an ideal power node, the results of the sensitivity model for each fan-out block can be added asynchronously to a total loadings of the power node. The total loadings can be loaded into a matrix, which is computed for the fan-in block, and a simulation waveform point can be output.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: October 21, 2014
    Assignee: Synopsys, Inc.
    Inventors: He Dong, Michael Z. Chui, Andrey Y. Tarasevich
  • Publication number: 20130246015
    Abstract: In accordance with an exemplary simulation technique, an improved selective application of Newton-Raphson iterations can improve accuracy while ensuring good performance. In this method, selectively applying Newton-Raphson iteration in a simulation of a unit of the integrated circuit design can include determining second order effects to define a linearity value. Newton-Raphson iteration is performed when the linearity value is less than a linearity threshold and convergence of the simulation is not achieved.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: Synopsys, Inc.
    Inventors: He Dong, Michael Z. Chui, Shan Yuan
  • Publication number: 20100106476
    Abstract: In a fast simulation technique, the output node of a power supply module of the integrated circuit can be designated as an ideal power node. At this point, the power supply module can be designated a fan-in block and any blocks connected to the power node can be designated fan-out blocks. Then, DC initialization and transient simulation for each time step can be performed for the circuit. During the transient simulation, any inter-relationship of the fan-out blocks can be determined and a sensitivity model can be calculated for each fan-out block. Because the power node is designated as an ideal power node, the results of the sensitivity model for each fan-out block can be added asynchronously to a total loadings of the power node. The total loadings can be loaded into a matrix, which is computed for the fan-in block, and a simulation waveform point can be output.
    Type: Application
    Filed: October 27, 2008
    Publication date: April 29, 2010
    Applicant: Synopsys, Inc.
    Inventors: He Dong, Michael Z. Chui, Andrey Y. Tarasevich