Patents by Inventor Michael Z. Felske

Michael Z. Felske has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Partial good integrated circuit and method of testing same
    Patent number: 7478301
    Abstract: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: January 13, 2009
    Assignee: International Business Machines Corporation
    Inventors: Leonard O. Farnsworth, III, Michael Z. Felske, Pamela S. Gillis, Benjamin P. Lynch, Michael R. Ouellette, Thomas St. Pierre, Tad J. Wilder, Carl F. Barnhart
  • Partial good integrated circuit and method of testing same
    Patent number: 7434129
    Abstract: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: October 7, 2008
    Assignee: International Business Machines Corporation
    Inventors: Leonard O. Farnsworth, III, Michael Z. Felske, Pamela S. Gillia, Benjamin P. Lynch, Michael R. Ouellette, Thomas St. Pierre, Tad J. Wilder, Carl F. Barnhart
  • PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
    Publication number: 20080209289
    Abstract: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.
    Type: Application
    Filed: May 2, 2008
    Publication date: August 28, 2008
    Inventors: Leonard O. Farnsworth, Michael Z. Felske, Pamela S. Gillis, Benjamin P. Lynch, Michael R. Ouellette, Thomas St. Pierre, Tad J. Wilder, Carl F. Barnhart
  • Partial good integrated circuit and method of testing same
    Patent number: 7305600
    Abstract: An integrated circuit, including: a multiplicity of macro-circuits, each macro-circuit having the same function; a fuse bank containing a multiplicity of fuses, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing macro-circuits during operation of the integrated circuit and a method generating a partial good integrated circuit, the method including: providing an integrated circuit have a multiplicity of macro-circuits arranged in one or more groups, each macro-circuit having the same function and a fuse bank containing fuses; testing each macro-circuit prior to a fuse programming operation; programming the fuses in the fuse bank in order to store data indicating at least which macro-circuits failed the testing step; and preventing utilization of each failing macro-circuit during operation of the integrated based on the data stored in the fuse bank.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: December 4, 2007
    Assignee: International Business Machines Corporation
    Inventors: Leonard O. Farnsworth, III, Michael Z. Felske, Pamela S. Gillis, Benjamin P. Lynch, Michael R. Ouellette, Thomas St.Pierre, Tad J. Wilder, Carl F. Barnhart