Patents by Inventor Michal Karol Bogusz
Michal Karol Bogusz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11616937Abstract: When a producer processing unit, such as a video decoder, of a media processing system is producing a data output for use by a consumer processing unit, such as a display processor, the producer processing unit also generates metadata for the data output that it is producing and provides that metadata for use by the consumer processing unit. The consumer processing unit then uses the metadata provided by the producer processing unit when processing the data output to which the metadata relates.Type: GrantFiled: May 13, 2019Date of Patent: March 28, 2023Assignee: Arm LimitedInventors: Damian Piotr Modrzyk, Viacheslav Chesnokov, Sven Ola Johannes Hugosson, Alex Kornienko, Guney Kayim, Ertunc Erdil, Dominic Hugo Symes, Brian Paul Starkey, Michal Karol Bogusz
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Patent number: 10659723Abstract: A data processing system includes a scaler 18 operable to scale a received input data array to provide a scaled output version of the input data array. When it is desired to produce a de-interlaced and scaled output version of an input data array 21, 22, the input data array 21, 22 is provided to the scaler 18, and the scaler 18 scales the input data array 21, 22 so as to simultaneously de-interlace and scale the input data array and to produce a de-interlaced and scaled output version of the input data array.Type: GrantFiled: November 12, 2017Date of Patent: May 19, 2020Assignee: Arm LimitedInventors: Michal Karol Bogusz, Piotr Tadeusz Chrobak
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Patent number: 10592146Abstract: A method of operating a data processing system 4 is disclosed that comprises producing data in the form of blocks of data, where each block of data represents a particular region of a data array, processing the data using a processing operation in which one or more output data values are each determined using data values from plural different lines of the data array, storing the processed data in a memory 21 of the data processing system, and reading the data from the memory 21 in the form of lines.Type: GrantFiled: June 27, 2017Date of Patent: March 17, 2020Assignee: Arm LimitedInventors: Sharjeel Saeed, Kushan Vijaykumar Vyas, Michal Karol Bogusz, Piotr Tadeusz Chrobak, Ozgur Ozkurt
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Patent number: 10593305Abstract: A display controller for a data processing system includes a memory read sub-system operable to read data of input surfaces to be used as input layers to be processed by the display controller. The memory read sub-system is operable to request in advance the loading of memory address translation data into a memory address translation data cache for memory pages storing data relating to an input surface. The memory read sub-system selects the memory pages that it requests the advance loading of address translation data for based on information relating to the data for the input surface that will be required by the display controller to generate the output surface, such as the vertical and horizontal size of the input layer that the input surface will be used for, an indication of any flipping or rotation of the input surface, etc.Type: GrantFiled: November 28, 2016Date of Patent: March 17, 2020Assignee: Arm LimitedInventors: Michal Karol Bogusz, Damian Piotr Modrzyk, Quinn Carter, Thomas James Cooksey
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Patent number: 10565966Abstract: In a display controller of a data processing system, when composing two or more input surfaces to generate a composited surface comprising the two or more input surfaces, data indicating a border between different input surfaces in the composited surface is associated with the composited surface. The data indicative of the border between two input surfaces in the composited surface is then used to control subsequent processing, such as compression and/or filtering, of the composited surface.Type: GrantFiled: October 6, 2016Date of Patent: February 18, 2020Assignee: Arm LimitedInventors: Michal Karol Bogusz, Piotr Tadeusz Chrobak
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Patent number: 10496165Abstract: A device comprises a content-processing component operable to perform a content-processing operation. The device comprises a sensor operable to output data indicative of activity of an eyelid of a user of the device. The device comprises a processor configured to process the data output by the sensor, to cause the content-processing operation to be in an enabled state in response to the processing of the data output by the sensor indicating that the eyelid is open by more than an open-eyelid threshold, and to cause the content-processing operation to be in a disabled state in response to the processing of the data output by the sensor indicating that the eyelid is closed by more than a closed-eyelid threshold.Type: GrantFiled: May 16, 2018Date of Patent: December 3, 2019Assignee: Arm LimitedInventors: Michal Karol Bogusz, Piotr Tadeusz Chrobak, Michal Golek, Tomasz Jan Pabis
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Publication number: 20190349558Abstract: When a producer processing unit, such as a video decoder, of a media processing system is producing a data output for use by a consumer processing unit, such as a display processor, the producer processing unit also generates metadata for the data output that it is producing and provides that metadata for use by the consumer processing unit. The consumer processing unit then uses the metadata provided by the producer processing unit when processing the data output to which the metadata relates.Type: ApplicationFiled: May 13, 2019Publication date: November 14, 2019Applicants: Arm Limited, Apical LimitedInventors: Damian Piotr Modrzyk, Viacheslav Chesnokov, Sven Ola Johannes Hugosson, Alex Kornienko, Guney Kayim, Ertunc Erdil, Dominic Hugo Symes, Brian Paul Starkey, Michal Karol Bogusz
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Patent number: 10395339Abstract: In a data processing system, an input data array to be downscaled is split into plural parts along its horizontal extent and the different parts of the input data array are then provided to respective scalers of the data processing system and are respectively downscaled by those scalers to provide a plurality of downscaled output parts. The plural downscaled output parts are then combined (merged) to provide the desired downscaled output data array.Type: GrantFiled: June 29, 2017Date of Patent: August 27, 2019Assignee: Arm LimitedInventors: Michal Karol Bogusz, Tomasz Jan Pabis
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Patent number: 10276125Abstract: In a display controller, output surface data from a composition processing stage 22 is received by and stored in a local latency hiding buffer 40 of a memory write subsystem 31 before being written out to an external memory. The local buffer 40 of the memory write subsystem 31 signals when it is “full”, and in response thereto the inputting of output surface data to the local buffer 40 is stopped until the current line of the output surface has been finished, and then started again when the next line of the output surface begins. The writing of any data for the line of the output surface that was being written to the local buffer 40 that is already present in the local buffer 40 and not yet written to the external memory is also skipped, and it is recorded that the output surface line in question is not properly stored in the external memory.Type: GrantFiled: September 30, 2016Date of Patent: April 30, 2019Assignee: Arm LimitedInventors: Piotr Tadeusz Chrobak, Michal Karol Bogusz
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Patent number: 10255195Abstract: An apparatus, system, and method for address translation are provided. Physical address information corresponding to virtual addresses is prefetched and stored, where at least some sequences of the virtual addresses are in a predefined order. The physical address information is prefetched based on identification information provided by a data processing activity, comprising at least a segment identifier and a portion of a virtual address to be translated. The storage has segments of entries, wherein each segment stores physical address information which corresponds to virtual addresses in a predefined order. This predefined order means that it is not necessary to store virtual addresses in the storage. Storage capacity and response speed are therefore gained.Type: GrantFiled: June 6, 2017Date of Patent: April 9, 2019Assignee: ARM LIMITEDInventors: Michal Karol Bogusz, Quinn Carter, Andrew Brookfield Swaine
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Publication number: 20180373432Abstract: A method of operating a data processing system 4 is disclosed that comprises producing data in the form of blocks of data, where each block of data represents a particular region of a data array, processing the data using a processing operation in which one or more output data values are each determined using data values from plural different lines of the data array, storing the processed data in a memory 21 of the data processing system, and reading the data from the memory 21 in the form of lines.Type: ApplicationFiled: June 27, 2017Publication date: December 27, 2018Applicant: ARM LimitedInventors: Sharjeel Saeed, Kushan Vijaykumar Vyas, Michal Karol Bogusz, Piotr Tadeusz Chrobak, Ozgur Ozkurt
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Publication number: 20180335837Abstract: A device comprises a content-processing component operable to perform a content-processing operation. The device comprises a sensor operable to output data indicative of activity of an eyelid of a user of the device. The device comprises a processor configured to process the data output by the sensor, to cause the content-processing operation to be in an enabled state in response to the processing of the data output by the sensor indicating that the eyelid is open by more than an open-eyelid threshold, and to cause the content-processing operation to be in a disabled state in response to the processing of the data output by the sensor indicating that the eyelid is closed by more than a closed-eyelid threshold.Type: ApplicationFiled: May 16, 2018Publication date: November 22, 2018Inventors: Michal Karol BOGUSZ, Piotr Tadeusz CHROBAK, Michal GOLEK, Tomasz Jan PABIS
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Publication number: 20180146158Abstract: A data processing system includes a scaler 18 operable to scale a received input data array to provide a scaled output version of the input data array. When it is desired to produce a de-interlaced and scaled output version of an input data array 21, 22, the input data array 21, 22 is provided to the scaler 18, and the scaler 18 scales the input data array 21, 22 so as to simultaneously de-interlace and scale the input data array and to produce a de-interlaced and scaled output version of the input data array.Type: ApplicationFiled: November 12, 2017Publication date: May 24, 2018Applicant: Arm LimitedInventors: Michal Karol Bogusz, Piotr Tadeusz Chrobak
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Publication number: 20180101928Abstract: In a display controller of a data processing system, when composing two or more input surfaces to generate a composited surface comprising the two or more input surfaces, data indicating a border between different input surfaces in the composited surface is associated with the composited surface. The data indicative of the border between two input surfaces in the composited surface is then used to control subsequent processing, such as compression and/or filtering, of the composited surface.Type: ApplicationFiled: October 6, 2016Publication date: April 12, 2018Applicant: ARM LimitedInventors: Michal Karol Bogusz, Piotr Tadeusz Chrobak
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Publication number: 20180095677Abstract: In a display controller, output surface data from a composition processing stage 22 is received by and stored in a local latency hiding buffer 40 of a memory write subsystem 31 before being written out to an external memory. The local buffer 40 of the memory write subsystem 31 signals when it is “full”, and in response thereto the inputting of output surface data to the local buffer 40 is stopped until the current line of the output surface has been finished, and then started again when the next line of the output surface begins. The writing of any data for the line of the output surface that was being written to the local buffer 40 that is already present in the local buffer 40 and not yet written to the external memory is also skipped, and it is recorded that the output surface line in question is not properly stored in the external memory.Type: ApplicationFiled: September 30, 2016Publication date: April 5, 2018Applicant: ARM LimitedInventors: Piotr Tadeusz Chrobak, Michal Karol Bogusz
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Publication number: 20180005351Abstract: In a data processing system, an input data array to be downscaled is split into plural parts along its horizontal extent and the different parts of the input data array are then provided to respective scalers of the data processing system and are respectively downscaled by those scalers to provide a plurality of downscaled output parts. The plural downscaled output parts are then combined (merged) to provide the desired downscaled output data array.Type: ApplicationFiled: June 29, 2017Publication date: January 4, 2018Applicant: ARM LimitedInventors: Michal Karol Bogusz, Tomasz Jan Pabis
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Publication number: 20180004678Abstract: An apparatus, system, and method for address translation are provided. Physical address information corresponding to virtual addresses is prefetched and stored, where at least some sequences of the virtual addresses are in a predefined order. The physical address information is prefetched based on identification information provided by a data processing activity, comprising at least a segment identifier and a portion of a virtual address to be translated. The storage has segments of entries, wherein each segment stores physical address information which corresponds to virtual addresses in a predefined order. This predefined order means that it is not necessary to store virtual addresses in the storage. Storage capacity and response speed are therefore gained.Type: ApplicationFiled: June 6, 2017Publication date: January 4, 2018Inventors: Michal Karol BOGUSZ, Quinn CARTER, Andrew Brookfield SWAINE
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Publication number: 20170162179Abstract: A display controller for a data processing system includes a memory read sub-system operable to read data of input surfaces to be used as input layers to be processed by the display controller. The memory read sub-system is operable to request in advance the loading of memory address translation data into a memory address translation data cache for memory pages storing data relating to an input surface. The memory read sub-system selects the memory pages that it requests the advance loading of address translation data for based on information relating to the data for the input surface that will be required by the display controller to generate the output surface, such as the vertical and horizontal size of the input layer that the input surface will be used for, an indication of any flipping or rotation of the input surface, etc.Type: ApplicationFiled: November 28, 2016Publication date: June 8, 2017Applicant: ARM LimitedInventors: Michal Karol Bogusz, Damian Piotr Modrzyk, Quinn Carter, Thomas James Cooksey