Abstract: Disclosed herein are techniques for implementing high-throughput low-latency hybrid memory modules with improved data backup and restore throughput, enhanced non-volatile memory controller (NVC) resource access, and enhanced mode register setting programmability. Embodiments comprise a command replicator to generate sequences of one or more DRAM read and/or write and/or other commands to be executed in response to certain local commands from a non-volatile memory controller (NVC) during data backup and data restore operations. Other embodiments comprise an access engine to enable an NVC in a host control mode to trigger entry into a special mode and issue commands to access a protected register space. Some embodiments comprise a mode register controller to capture and store the data comprising mode register setting commands issued during a host control mode, such that an NVC can program the DRAM mode registers in an NVC control mode.

Abstract: An electronic module and method that enable circuitry required by one form of the module (e.g., a developmental unit) to be omitted in a second form of the module (e.g., a production unit), without necessitating additional changes in the module. The electronic module includes a motherboard, a multichip module (MCM) mounted to the motherboard, and a circuit unit connected to the MCM. The circuit unit comprises a flexible substrate, instrumentation circuitry mounted on the flexible substrate, and a connector coupled to the flexible substrate. The flexible substrate has signal lines that electrically communicate with the MCM, the instrumentation circuitry, and the connector. A portion of the flexible substrate is located between the MCM and the motherboard and permits electrical communication therebetween. The instrumentation circuitry does not occupy space on the motherboard.