Abstract: A method of controller an AC/DC to converter is disclosed, the converter having a power factor correction stage and a signal indicative of a required power and operating with a switching cycle having a switching frequency being the inverse of a switching period. The method comprises switching on the PFC stage, in response to a signal indicative of an average switching frequency rising above a first threshold. The method further comprises switching off the PFC stage, in response to the signal indicative of an average switching frequency falling below a second threshold. The method may further comprise switching on the PFC stage, in response to a positive step change in the signal indicative of a required power, and switching off the PFC stage, in response to indicative step change in the signal indicative of a required power. A controller and an AC/DC converter operable according to such a method are also disclosed as is an LED lighting system comprising such a controller.

Abstract: A method of controller an AC/DC to converter is disclosed, the converter having a power factor correction stage and a signal indicative of a required power and operating with a switching cycle having a switching frequency being the inverse of a switching period. The method comprises switching on the PFC stage, in response to a signal indicative of an average switching frequency rising above a first threshold. The method further comprises switching off the PFC stage, in response to the signal indicative of an average switching frequency falling below a second threshold. The method may further comprise switching on the PFC stage, in response to a positive step change in the signal indicative of a required power, and switching off the PFC stage, in response to indicative step change in the signal indicative of a required power. A controller and an AC/DC converter operable according to such a method are also disclosed as is an LED lighting system comprising such a controller.

Abstract: A method of operating a programmed synthesizer which provides from a specification of function defining a data processor a netlist constituting a technology mapping of the processor in terms of a selected technical realization includes storing in a data storage device a library comprising a multiplicity of sets of data each set of which defines a basic cell and operational parameters thereof, the method further comprising scaling said parameters and performing the realization of the processor employing the scaled parameters of selected cells. A suite of scaling factors is defined for the parameters of the cells in the library; and the selected processor is realized employing the selected cells parameters scaled according to said suite of scaling factors. The invention is useful when the operating conditions intended for the processor are different from those for which the parameters are specified.