Patents by Inventor Michel Andre Robert Henrion

Michel Andre Robert Henrion has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7486675
    Abstract: Network-units (4) comprising multicast driver devices (3) handle multicast messages efficiently by providing the multicast driver devices (3) with memory nodes (1,2) arranged in rows and/or columns, with a memory node (1,2) comprising a memory element (31-33) for memorizing a state of the memory node (1,2). Large numbers of multicast cells/groups like multicast cells and/or multicast groups can be served advantageously. M×N memory nodes (1,2) are arranged in M rows and N columns, with a memory node (1,2) comprising an engagement line (11), an unavailability line (12) and an identification line (13) per row and a request line (21), an acknowledgement line (22) and a selection line (23) per column. A memory element (31,32) memorizes a state indicating a destination port being used for a multicast cell/group, and a further memory element (33) indicates a state requesting a generation of a multicast copy for a destination port, all according to a rule of exclusiveness.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: February 3, 2009
    Assignee: ALCATEL
    Inventor: Michel André Robert Henrion
  • Publication number: 20030210695
    Abstract: A method is described for forwarding a data packet within a subnetwork (S) of interconnected cell switching nodes (1,2,3,4), surrounded by edge packet routers (A,B,C,D,E), which are further surrounded and part of a data packet network of routers. Said data packet enters said subnetwork via an ingress edge packet router (B), passes through at least one cell switching node (1), and leaves it via at least one destination egress edge packet router (A,C,D,E). The method includes the steps of associating a destination forwarding tag to said data packet, of deriving a sequence of fixed length cells for further transmission to said at least one cell switching node (1), of dynamically analyzing said destination forwarding tag for elaborating a packet cell forwarding decision applicable to all cells of said sequence, and thereby performing a subsequent transfer action of said all cells, to at least one outgoing link.
    Type: Application
    Filed: April 25, 2003
    Publication date: November 13, 2003
    Applicant: ALCATEL
    Inventor: Michel Andre Robert Henrion
  • Patent number: 6469982
    Abstract: The method shares available bandwidth on a common link in a communication network among a plurality of data flows which are transmitted via the common link. The method is used by a processor and includes sharing reserved bandwidth included in the available bandwidth among the plurality of data flows, and sharing unreserved bandwidth among the plurality of data flows according to a respective unreserved data packet share which is associated to each one of the plurality of data flows. The unreserved bandwidth is included in the available bandwidth in excess of the reserved bandwidth. The sharing of the unreserved bandwidth includes associating to one of the plurality of data flows a respective adaptable administrative weight and determining the respective unreserved data packet share which is associated to the one data flow as a function of its respective adaptable administrative weight.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: October 22, 2002
    Assignee: Alcatel
    Inventors: Michel André Robert Henrion, Olivier Bonaventure, Peter Irma August Barri, Emmanuel Desmet, Johan Gabriël August Verkinderen
  • Patent number: 4086437
    Abstract: A synchronization circuit for a system in which digital coded data is received by an exchange from a transmitting station in time division multiplex form and is transmitted in time division multiplex form. In such a system, the incoming data is received at a clock rate dependent on the clock of the transmitting station and is stored in a memory at that rate. Read out from the memory is at the exchange rate. Since only one operation in the memory, either read or write, can occur at a time, control must be imposed to separate in time the reading and writing operations. To provide this separation, a time shift equal in duration to one time slot is introduced to delay the later-started of two operations.
    Type: Grant
    Filed: September 27, 1976
    Date of Patent: April 25, 1978
    Assignee: International Standard Electric Corporation
    Inventors: Michel Andre Robert Henrion, Andre Lucien Coudray
  • Patent number: 4076964
    Abstract: Synchronization control circuit for a time divisional data transmitting and receiving system. Data is received at an exchange at a clock rate determined by the transmitting station and is stored in memory at that rate. Read-out of data from the memory is based on the internal clock rate of the exchange. Since only one operation -- read or write -- can occur on a memory at any one time and the operations are controlled at rates which may be out of synchronism with one another, conflicts may occur. To prevent such conflicts, a time shift of predetermined duration is inserted between operations when the out-of-synchronism interval is less than a predetermined time interval.
    Type: Grant
    Filed: July 26, 1976
    Date of Patent: February 28, 1978
    Assignee: International Standard Electric Corporation
    Inventors: Michel Andre Robert Henrion, Andre Lucien Coudray