Patents by Inventor Michel Brice

Michel Brice has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5001468
    Abstract: The flat panel display device is organized so as to have, on its front side, a part with dedicated liquid crystals used in back-up mode, a matrix display part with non-dedicated liquid crystals used in normal mode, and a keyboard where the meaning of its keys is displayed by the matrix. Furthermore, the non-dedicated liquid crystal matrix is addressed so as to increase operational safety and displaying speed.
    Type: Grant
    Filed: September 1, 1988
    Date of Patent: March 19, 1991
    Assignee: Thomson-CSF
    Inventors: Michel Brice, Jean-Michel Buisson, Jean-Marie Soubrier
  • Patent number: 4541073
    Abstract: A flip-flop further comprising two branches with MNOS elements serially connected with P channel MOS transistors for permitting a non-volatile storing of the informations comprised in the flip-flop at a chosen storing time. The memorization of the state of the flip-flop can be made in a single cycle by acting on the control signal applied to the gate of the P channel transistors and on the supply voltage of the device. In the same way, the resetting can be made in a single cycle.
    Type: Grant
    Filed: September 28, 1982
    Date of Patent: September 10, 1985
    Assignee: Societe pour l'Etude et la Fabrication de Circuits Integres Speciaux
    Inventors: Jean-Michel Brice, Patrick Maillart
  • Patent number: 4512029
    Abstract: This invention concerns counters.More specifically, it relates to a non-volatile counting decade, comprising five flipflops, the outputs of which represent the decimal contents of the decade in the Johnson code. In this code, no flipflop changes its state more than twice in the course of a counting cycle from 0 to 10. The state of the counter is safeguarded on every incrementation, in separate safeguard circuits for each flipflop, formed of MNOS or floating-base transistors. However, any flipflop output state is safeguarded only if its state has changed after incrementation, this being detected by a logic circuit, which selects the safeguard signal for each flipflop.By means of an extremely simple combinative circuit, this invention thereby greatly reduces the number of writing cycles to be performed by the MNOS or floating-base transistors, which cannot withstand an excessive number of writing cycles.
    Type: Grant
    Filed: September 29, 1982
    Date of Patent: April 16, 1985
    Assignee: Societe pour l'Etude et la Fabrication de Circuits
    Inventor: Jean-Michel Brice
  • Patent number: 4499560
    Abstract: A flip-flop further comprising two branches with MNOS elements serially connected with P channel MOS transistors for permitting a non-volatile storing of the information contained in a flip-flop at a chosen memorizing time. The memorizing of the state of the flip-flop can be made in a single cycle by raising the supply voltage of the device. In the same way, the resetting can be made in a single cycle by restoring abruptily the power voltage.
    Type: Grant
    Filed: September 28, 1982
    Date of Patent: February 12, 1985
    Assignee: E.F.C.I.S.
    Inventor: Jean-Michel Brice