Patents by Inventor Michel Guillot

Michel Guillot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9994308
    Abstract: A cross tube for a helicopter skid landing gear, including a monolithic metallic tube having a central portion extending transversely between two end portions with longitudinal central axes of the central portion and of the end portions being located in a plane, where the central portion has inner and outer heights, the end portions each have inner and outer heights, and the inner and outer heights of one of the central portion and the end portion are respectively greater than the inner and outer heights of the other of the central portion and the end portion. A skid tube with two portions with cross-sections having one or both of different orientations with respect to one another and different dimensions with respect to one another, and a method of forming a structural tube for a helicopter skid landing gear are also provided.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: June 12, 2018
    Assignees: Bell Helicopter Textron Inc., Université Laval
    Inventors: Simon Bernier, Robert Clive Fews, Michel Guillot, Augustin Gakwaya, Jocelyn Blanchet, Xavier Jean-Gilles Elie-Dit-Cosaque, Julie Levesque, Giuseppe Aquino
  • Publication number: 20140224928
    Abstract: A cross tube for a helicopter skid landing gear, including a monolithic metallic tube having a central portion extending transversely between two end portions with longitudinal central axes of the central portion and of the end portions being located in a plane, where the central portion has inner and outer heights, the end portions each have inner and outer heights, and the inner and outer heights of one of the central portion and the end portion are respectively greater than the inner and outer heights of the other of the central portion and the end portion. A skid tube with two portions with cross-sections having one or both of different orientations with respect to one another and different dimensions with respect to one another, and a method of forming a structural tube for a helicopter skid landing gear are also provided.
    Type: Application
    Filed: December 19, 2013
    Publication date: August 14, 2014
    Applicants: UNIVERSITE LAVAL, BELL HELICOPTER TEXTRON INC.
    Inventors: Simon BERNIER, Robert Clive FEWS, Michel GUILLOT, Augustin GAKWAYA, Jocelyn BLANCHET, Xavier Jean-Gilles ELIE-DIT-COSAQUE, Julie LEVESQUE, Giuseppe AQUINO
  • Patent number: 8562022
    Abstract: Improved trailers (e.g., semi-trailers) are disclosed. The trailers may include a floor having a top surface and a bottom surface, where the top surface is adapted to transport a payload, and an elongated shell connected to the bottom surface of the floor, where the elongated shell defines a portion of a substantially closed torsion-resistant chamber of the trailer. The trailers may have a torsion resistance that is substantially higher than conventional trailers of similar size and/or load capacity. The trailers may weigh substantially less than conventional trailers of similar size and/or load capacity. The trailers may realize a bending resistance that is at least equivalent to the bending resistance of conventional trailers of similar size and/or load capacity.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: October 22, 2013
    Assignee: Alutrec Inc.
    Inventors: Julien Nadeau, Michel Guillot, Jean-Christian Methot, Russell S. Long
  • Patent number: 8049271
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: November 1, 2011
    Assignee: Vishay General Semiconductor LLC
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Publication number: 20100207198
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Application
    Filed: May 3, 2010
    Publication date: August 19, 2010
    Applicant: GS GENERAL SEMICONDUCTOR LLC
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Patent number: 7736976
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: June 15, 2010
    Assignee: Vishay General Semiconductor LLC
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Publication number: 20090315297
    Abstract: Improved trailers (e.g., semi-trailers) are disclosed. The trailers may include a floor having a top surface and a bottom surface, where the top surface is adapted to transport a payload, and an elongated shell connected to the bottom surface of the floor, where the elongated shell defines a portion of a substantially closed torsion-resistant chamber of the trailer. The trailers may have a torsion resistance that is substantially higher than conventional trailers of similar size and/or load capacity. The trailers may weigh substantially less than conventional trailers of similar size and/or load capacity. The trailers may realize a bending resistance that is at least equivalent to the bending resistance of conventional trailers of similar size and/or load capacity.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 24, 2009
    Applicants: Alcoa Inc., Alutrec Inc., Universite Laval
    Inventors: Julien Nadeau, Michel Guillot, Jean-Christian Methot, Russell S. Long
  • Patent number: 7540850
    Abstract: The invention concerns an orthosis (1) for preventing and treating hypertrophy (22), keloid, bridle, scar retraction, to improve functional and aesthetic quality and enable scar growth. Said orthosis (2) enables to enhance [sic] the quality of healing, to decrease the number of repair surgical procedures for functional purposes. It provides the patient with more aesthetic movements. Said orthosis is characterized in that it comprises one or more treatment units (2) having a mechanical pressing action (13) on the scar and an activator (3) for enhancing the action of the units (2), for increasing their attachment, for transmitting traction derived from the patient's movements.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: June 2, 2009
    Inventor: Michel Guillot
  • Publication number: 20080142880
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 19, 2008
    Applicant: Vishay General Semiconductor LLC
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Patent number: 7304347
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: December 4, 2007
    Assignee: Vishay General Semiconductor Inc.
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Publication number: 20060261069
    Abstract: The invention involves a device for closing packages, in particular for single use, of bottle types or packs that can be nested and recycled. The inner membrane sealed capsule permits advances in terms of storage and hygiene. It is of interest to the packaging sectors that contain a product at atmospheric pressure or under pressure, for aerated or sparkling beverages for instances, for varied products such as foods, pharmaceuticals, chemical products, etc.
    Type: Application
    Filed: February 27, 2004
    Publication date: November 23, 2006
    Inventor: Michel Guillot
  • Publication number: 20050010149
    Abstract: The invention concerns an orthosis (1) for preventing and treating hypertrophy (22), keloid, bridle, scar retraction, to improve functional and aesthetic quality and enable scar growth. Said orthosis (2) enables to enhance [sic] the quality of healing, to decrease the number of repair surgical procedures for functional purposes. It provides the patient with more aesthetic movements. Said orthosis is characterized in that it comprises one or more treatment units (2) having a mechanical pressing action (13) on the scar and an activator (3) for enhancing the action of the units (2), for increasing their attachment, for transmitting traction derived from the patient's movements.
    Type: Application
    Filed: September 5, 2002
    Publication date: January 13, 2005
    Inventor: Michel Guillot
  • Publication number: 20040097028
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Application
    Filed: November 13, 2003
    Publication date: May 20, 2004
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Publication number: 20040075160
    Abstract: A semiconductor device includes a heavily doped first layer of a first conductivity type having a bulk portion and a mesa portion disposed above the bulk portion. A second layer of a second conductivity type is deposited on the mesa portion of the first layer to form a p-n junction therewith. The second layer is more lightly doped than the first layer. A contact layer of the second conductivity type is formed on the second layer. First and second electrodes electrically contact the bulk portion of the first layer and the contact layer, respectively.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 22, 2004
    Inventors: Jack Eng, John Naughton, Lawrence Laterza, James Hayes, Jean-Michel Guillot
  • Patent number: 6649477
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: November 18, 2003
    Assignee: General Semiconductor, Inc.
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Patent number: 6624494
    Abstract: A power semiconductor device and a method of forming the same is provided. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of the trench. The dopant is diffused to form a first doped layer in the epitaxial layer and the barrier material is removed from at least the bottom of the trench. The trench is etched through the first doped layer and a filler material is deposited in the trench to substantially fill the trench, thus completing the voltage sustaining region.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: September 23, 2003
    Assignee: General Semiconductor, Inc.
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Publication number: 20030068854
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.
    Type: Application
    Filed: October 4, 2001
    Publication date: April 10, 2003
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Publication number: 20030068863
    Abstract: A power semiconductor device and a method of forming the same is provided. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of the trench. The dopant is diffused to form a first doped layer in the epitaxial layer and the barrier material is removed from at least the bottom of the trench. The trench is etched through the first doped layer and a filler material is deposited in the trench to substantially fill the trench, thus completing the voltage sustaining region.
    Type: Application
    Filed: October 4, 2002
    Publication date: April 10, 2003
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Patent number: 6465304
    Abstract: A power semiconductor device and a method of forming the same is provided. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of the trench. The dopant is diffused to form a first doped layer in the epitaxial layer and the barrier material is removed from at least the bottom of the trench. The trench is etched through the first doped layer and a filler material is deposited in the trench to substantially fill the trench, thus completing the voltage sustaining region.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: October 15, 2002
    Assignee: General Semiconductor, Inc.
    Inventors: Richard A. Blanchard, Jean-Michel Guillot
  • Patent number: D659476
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: May 15, 2012
    Assignee: Compagnie des Arts de la Table
    Inventor: Jean-Michel Guillot