Abstract: Disclosed are a method and system for calculating clock offset and skew between two clocks in a computer system. The method comprises the steps of sending data packets from a first processing unit in the computer system to a second processing unit in the computer system, and sending the data packets from the second processing unit to the first processing unit. First, second, third and fourth time stamps are provided to indicate, respectively, when the packets leave the first processing unit, arrive at the second processing unit, leave the second processing unit, and arrive at the first processing unit. The method comprises the further steps of defining a set of backward delay points using the fourth time stamps, and calculating a clock offset between clocks on the first and second processing units and clock skews of said clocks using said set of backward delay points.

Abstract: A system, method and computer program product for dynamically debugging a multi-node network comprising an infrastructure including a plurality of devices, each device adapted for communicating messages between nodes which may include information for synchronizing a timing clock provided in each node. The apparatus comprises a plurality of probe links interconnecting each node with a probe device that monitors data included in each message communicated by a node. Each probe device processes data from each message to determine existence of a trigger condition at a node and, in response to detecting a trigger condition, generates a specialized message for receipt by all nodes in the network. Each node responds to the specialized message by halting operation at the node and recording data useful for debugging purposes. In this manner, debug information is collected at each node at the time of a first error detection and collected dynamically at execution time without manual intervention.