Patents by Inventor Michel I. Ishac

Michel I. Ishac has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5812861
    Abstract: A powerdown controller receives a powerdown signal and causes a powerdown if the powerdown signal indicates a powerdown condition. An override signal also forces the powerdown controller to cause the powerdown when the powerdown signal is not indicating the powerdown condition. An override circuit generates the override signal if the powerdown condition is desired and the powerdown signal is not indicating the powerdown condition.
    Type: Grant
    Filed: June 22, 1995
    Date of Patent: September 22, 1998
    Assignee: Intel Corporation
    Inventors: Michel I. Ishac, Duane R. Mills, Russell D. Eslick
  • Patent number: 5438546
    Abstract: A nonvolatile memory includes a first and a second output, a main array having a first and a second column, and a redundant array having a first and a second redundant column. A logic includes a first and a second CAM set. The first CAM set activates the first redundant column to replace the first column if defective. The second CAM set activates the second redundant column to replace the second column if it is defective. A configuration circuit is provided for controlling the logic to selectively couple the first and second columns and the first and second redundant columns to the first and second outputs. When the configuration circuit is in a first state, the logic couples the first redundant column to the first output if it is activated and the second redundant column to the second output if it is activated.
    Type: Grant
    Filed: June 2, 1994
    Date of Patent: August 1, 1995
    Assignee: Intel Corporation
    Inventors: Michel I. Ishac, Sanjay S. Talreja, Mark E. Bauer