Abstract: Systems, methods, and apparatuses for implementing, managing, controlling, or otherwise processing customer recurrence data for transactions, such as a transaction between a customer and a resource provider, e.g., a merchant.

Abstract: Systems, methods, and apparatuses for implementing, managing, controlling, or otherwise processing customer recurrence data for transactions, such as a transaction between a customer and a resource provider, e.g., a merchant.

Abstract: Provided is a computer-implemented method, system, and computer program product for stand-in processing. The method includes receiving a transaction request message corresponding to a transaction, the transaction request message including a transaction value and an account identifier, determining whether to process the transaction request message as a stand-in transaction based at least partially on the transaction request message, in response to determining to process the transaction request message as a stand-in transaction, determining an account capacity corresponding to the account identifier, determining whether to authorize the stand-in transaction based at least partially on the transaction value and the account capacity, and in response to determining to authorize the stand-in transaction, completing the stand-in transaction. A system and computer program product are also disclosed.

Abstract: Systems, methods, and apparatuses for implementing, managing, controlling, or otherwise processing customer recurrence data for transactions, such as a transaction between a customer and a resource provider, e.g., a merchant.

Abstract: Provided is a computer-implemented method, system, and computer program product for stand-in processing. The method includes receiving a transaction request message corresponding to a transaction, the transaction request message including a transaction value and an account identifier, determining whether to process the transaction request message as a stand-in transaction based at least partially on the transaction request message, in response to determining to process the transaction request message as a stand-in transaction, determining an account capacity corresponding to the account identifier, determining whether to authorize the stand-in transaction based at least partially on the transaction value and the account capacity, and in response to determining to authorize the stand-in transaction, completing the stand-in transaction. A system and computer program product are also disclosed.

Abstract: The present invention relates to a method of manufacturing a MOS transistor, including the steps of delimiting, using a first resist mask N-type, drain and source implantation areas; removing the first mask and diffusing the implanted dopant; annealing, so that a thicker oxide forms above the source and drain regions than above the central gate insulation area; forming a polysilicon finger above the central gate insulation portion to form the gate of the MOS transistor; and performing a second source/drain implantation.

Abstract: The intrinsic collector of a vertical bipolar transitor is grown epitaxially on an extrinsic collector layer buried in a semiconductor substrate. A lateral isolation region surrounds the upper part of the intrinsic collector and an offset extrinsic collector well is produced. An SiGe heterojunction base lying above the intrinsic collector and above the lateral isolation region is produced by non-selective epitaxy. An in-situ doped emitter is produced by epitaxy on a predetermined window in the surface of the base which lies above the intrinsic collector so as to obtain, at least above the window, an emitter region formed from single-crystal silicon and directly in contact with the silicon of the base.

Abstract: A method of manufacturing a BICMOS integrated circuit including an NPN transistor in a heavily-doped P-type wafer coated with a lightly-doped P-type layer, including the steps of forming an N well of collector of a bipolar transistor; coating the structure with a polysilicon seed layer and opening above collector well portions; growing undoped silicon, then P-type doped silicon to form a single-crystal silicon base region; depositing an insulating layer and opening it; depositing N-type emitter polysilicon and etching it outside useful areas; etching the base silicon outside useful areas; forming spacers; and forming a collector contact area at the same time as the drain implantation of the N-channel MOS transistors.

Abstract: A method of manufacturing a bipolar transistor in an integrated circuit including the steps of forming a P-type base area, coating this base area with an isolating layer, and forming an opening in the isolating layer at a location where it is desired to form the emitter region. The method further includes coating the structure with an N-type doped polysilicon layer, etching the polysilicon layer to delimit a portion therefrom, forming spacers at a periphery of the polysilicon portion, and implanting a P-type dopant to form a base contact making region, after masking the polysilicon portion, above the area where it is in contact with the base area.